Dependence of Thin Oxide Films Quality on Surface Micro-Roughness

Miyashita, M.; Itano, Mitsushi; Imaoka, Takashi; Kawanabe, I.; Ohmi, Tadahiro

doi:10.1109/vlsit.1991.705982

Cited by 37 publications

(13 citation statements)

References 3 publications

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“…Therefore, the interruption of Si dissolution by the surfactant adsorption on the Si wafer surface is considered to be the mechanism. If the surfaetant molecules are adsorbed on the Si wafer surface according to the Langmuir type adsorption equationf where coverage (O) of the surfacrant molecule is given by @ = KC/(1 + KC) [1] where C is the concentration of the surfactant and K is the adsorption equilibrium constant. Moreover, if the dissolution of Si from the surface is suppressed where the surfactant molecules are adsorbed, the amount of dissolved Si(Ds~) is given by Dsi = D0(1 -O) [2] where Do is the amount of dissolved Si in the case when the surfactant is not added.…”

Section: Resultsmentioning

confidence: 99%

Prevention of Microroughness Generation on the Silicon Wafer Surface in Buffered Hydrogen Fluoride by a Surfactant Addition

Miyamoto¹,

Kita²,

Ishida³

et al. 1994

J. Electrochem. Soc.

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In order to prevent microroughness generation on the Si wafer surface in buffered hydrogen fluoride (BHF), the addition of a surfactant to BHF was investigated. It was found that mieroroughness generation on the Si wafer surface in BHF was prevented by adding the several 10 ppm surfactant. Also, the dissolution of Si into BHF from the Si wafer surface was suppressed by adding the surfactant. Microroughness generation was suppressed by lowering the N[-I4F concentration in BHF and the dissolution oi Si depended on the OH concentration rather than on the HF concentration in BHE For a wide range of HF and NH4F concentrations in BHF, the hydrocarbon anionic surfactant is effective for the prevention of microroughness generation. The prevention of microroughness generation is explained by the adsorption of the surfactant molecules on the Si wafer surface in accordance with the Langmuir type adsorption equation.

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Section: Resultsmentioning

confidence: 99%

Prevention of Microroughness Generation on the Silicon Wafer Surface in Buffered Hydrogen Fluoride by a Surfactant Addition

Miyamoto¹,

Kita²,

Ishida³

et al. 1994

J. Electrochem. Soc.

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“…Studies have shown that alkaline wet cleaning and ion implantation processes, which have been used many times before gate insulator film formation in CMOS fabrication processes, roughens atomically flat Si surfaces. 5,15,16) Although processes that can keep or recover atomically flat surfaces have been proposed, 5,15,[17][18][19] many modifications of process steps are still needed to introduce atomically flattening technology into the existing CMOS LSI process. Thus, it is desirable to introduce an atomically flattening process for Si wafers (having SiO 2 isolation patterns) just before the gate insulator film formation.…”

Section: Introductionmentioning

confidence: 99%

Atomically flattening of Si surface of silicon on insulator and isolation-patterned wafers

Goto

Kuroda

Akagawa

et al. 2015

Jpn. J. Appl. Phys.

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By introducing high-purity and low-temperature Ar annealing at 850 °C, atomically flat Si surfaces of silicon-on-insulator (SOI) and shallow-trench-isolation (STI)-patterned wafers were obtained. In the case of the STI-patterned wafer, this low-temperature annealing and subsequent radical oxidation to form a gate oxide film were introduced into the complementary metal oxide semiconductor (CMOS) process with 0.22 µm technology. As a result, a test array circuit for evaluating the electrical characteristics of a very large number (>260,000) of metal oxide semiconductor field effect transistors (MOSFETs) having an atomically flat gate insulator/Si interface was successfully fabricated on a 200-mm-diameter wafer. By evaluating 262,144 nMOSFETs, it was found that not only the gate oxide reliability was improved, but also the noise amplitude of the gate–source voltage related to the random telegraph noise (RTN) was reduced owing to the introduction of the atomically flat gate insulator/Si interface.

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“…The mechanism of the following contaminations has been developed previously; (i) adsorption and desorption of particles, 7-9 (it) growth and suppression of native oxide, 1~ and (~ii) suppression of surface microrougtmess. [2][3][4][5] This article studies adsorption and desorption of metallic impurities onto the Si surface.…”

mentioning

confidence: 99%

Segregation and Removal of Metallic Impurity at Interface of Silicon and Fluorine Etchant

Ohmi

Imaoka

Kezuka

et al. 1993

J. Electrochem. Soc.

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Realization of an ultraclean Si wafer surface is essential for achieving the advanced process in the ultralarge scale integrated production such as low-temperature process and high selectivity. An ultraclean wafer surface is defined as a surface completely free from particles, organic impurities, metallic impurities, native oxide, surface microroughness, and adsorbed impurities. Since metallic impurities, one of the above contaminants, cause fatal damage to device characteristics, metallic impurities on the wafer surface need to be suppressed at least below 10 l~ atom/cm 2 which is the level of the detection limit of total reflection x-ray fluorescence. The current dry processes such as ion implantation and reactive ion etching cause metallic contamination of 1012 to 1013 atom/cm 2. In order to remove the metallic contamination, the wet cleaning process plays an increasingly important role. When organic impurities remain on the wafer surface, native oxide and metallic impurities on the wafer cannot be completely removed. In order to establish an ultraclean wafer surface, therefore, it is crucial to remove organic impurities first of all. The wet cleaning process is the only possible method at present to remove trace organic contaminants on the wafer surface. We have studied the segregation and removal of metallic impurities on the solid/liquid interface between chemicals and various Si wafer surfaces (p, n, p+, n+). We tested several chemicals employed in the process to remove oxide on the Si surface. Metals featuring high electronegativity (such as Cu) are directly adsorbed on the bare Si surface while taking electrons away from the Si surface. It has been found that these metals are hard to remove. We used Cu as being representative of metals to be directly adsorbed on the bare Si surface and studied its segregation and removal on the solid/liquid interface between Si wafer and chemicals to keep the Si surface bare such as DHF, DHF-H~O2, and BHF. It has been found that Cu ion in DHF adheres on every Si wafer surface that we used in our study (p, n, p § n § especially on the n+-Si surface. The DHF-H202 solution is found to be effective in removing metals featuring high electronegativity such as Cu from the p-St and n-St wafers. Even when the DHF-H202 solution has Cu ions at the concentration of 1 ppm, this solution is found effective in cleaning the wafer. In the case of the n*-Si and p+-Si wafers, however, their surfaces get contaminated with Cu when Cu ion of 10 ppb remains in the DHF-H203 solution. When BHF is used, Cu in BHF is more likely to contaminate the p-St, n-St, and p+-Si wafers but is less likely to contaminate the n*-Si wafer. It is also revealed that the surfactant added to BHF to improve its wettability onto the Si wafer is effective in preventing Cu precipitation onto the p-St, n-St, and p*-Si wafers. This effect of the surfactant, however, is not observed on the n+-Si wafer. It is found also that the surface microroughness on the n § wafer is increased when it is immersed in the DHF-H202 soluti...

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Dependence of Thin Oxide Films Quality on Surface Micro-Roughness

Cited by 37 publications

References 3 publications

Prevention of Microroughness Generation on the Silicon Wafer Surface in Buffered Hydrogen Fluoride by a Surfactant Addition

Prevention of Microroughness Generation on the Silicon Wafer Surface in Buffered Hydrogen Fluoride by a Surfactant Addition

Atomically flattening of Si surface of silicon on insulator and isolation-patterned wafers

Segregation and Removal of Metallic Impurity at Interface of Silicon and Fluorine Etchant

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