Depletion trench capacitor technology for megabit level MOS dRAM

Matsukawa, Takashi; Minegishi, K.; Nakajima, Shigeru

doi:10.1109/edl.1983.25783

Cited by 16 publications

(6 citation statements)

References 4 publications

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“…Analyzing the flat-band voltage is preferred because in some cases the depletion regions of adjacent sidewalls reach through, rendering the lower section of the CV curve inaccurate. This behavior of V,, versus trench width is similar to that reported by Morie et al [2], which they attribute to the different surface doping on the trench bottom and sidewall. The authors relate this difference to a different PSG thickness on the bottom and (1 10) and (100) planes for a dry oxidation obtained simply by assuming a linear coefficient 1.6 times higher for the (1 10) case, as suggested by Irene [7], is given in Fig.…”

Section: Experimental Work and Discussionsupporting

confidence: 90%

“…4. Also indicated is the 1.4 factor which corresponds to the processing conditions of [2], in good agreement with their experimental value of 1.5. For our processing conditions of to, = 700 A grown at lOOO"C, a ratio of 1.15 is expected.…”

Section: Experimental Work and Discussionsupporting

confidence: 82%

“…refilled trenches in Si have been proposed as an alternative isolation technique for CMOS structures [ 11, as well as for capacitors in megabit memories [2], [3]. In the first application, the trench ideally provides dielectric isolation, limits the lateral diffusion of the well, and decreases the gain of the parasitic lateral transistor so that higher packing density and latch-up immunity could be attained.…”

Section: Introduction Ecently Deepmentioning

confidence: 99%

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A study of trenched capacitor structures

González

McVittie

1985

IEEE Electron Device Lett.

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Trenched structures have been fabricated using a highlsanisotropic low ion energy bombardment etching technique and evaluated using their CV characteristics. It is shown that the structure can be modeled by two capacitors in parallel, one for the bottom and the other for the sidewall. Obtained results indicate that the crystal orientation of the side and bottom surfaces of the trench determine the value of N,, fixed charge, and oxide thickness, especially in the thin range. Orientation-dependent oxidation rates account for the different oxide thicknesses on the sides and bottoms of the trenches. Both the value of N, and the oxide thickness on each wall determine the flat-band voltage V,, of the corresponding capacitors so that the overall capacitance behavior is given by the relative importance of the side and bottom components. A lower value of 1%) than previously reported is found with the etching technique used. It is also shown that an improvement of N, can be obtained by aligning the trench sidewall along the (100) plane.

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Section: Experimental Work and Discussionsupporting

confidence: 90%

Section: Experimental Work and Discussionsupporting

confidence: 82%

Section: Introduction Ecently Deepmentioning

confidence: 99%

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A study of trenched capacitor structures

González

McVittie

1985

IEEE Electron Device Lett.

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“…Si low-pressure chemical vapor deposition (LPCVD) is widely performed in semiconductor device fabrication. [1][2][3] In particular, the Si filling into deep trenches and contact holes is becoming difficult because of reductions in device dimensions; thus, these have become important development topics. The resistances of Si films in trenches or holes decrease owing to the doping of impurities, such as As and P. The two major impurity doping methods in Si LPCVD are as follows: in-situ doping, [4][5][6][7] in which a film is grown by adding AsH 3 (or PH 3 ) simultaneously with the SiH 4 source gas, and sequential doping, 8) in which a Si film growth step using SiH 4 and an AsH 3 (or PH 3 ) adsorption step are alternately performed.…”

Section: Introductionmentioning

confidence: 99%

Modeling and Simulation of Arsenic-Doped-Silicon Low-Pressure Chemical Vapor Deposition

Kinoshita

Konno

Takagi

et al. 2007

jjap

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In this paper, we present the modeling and simulation of As-doped-Si low-pressure chemical vapor deposition (LPCVD), in which a Si film growth step using SiH 4 and an AsH 3 adsorption step are alternately performed (sequential doping is carried out). We focus on the Si film growth in the second step of sequential doping, which involves Si film growth (first step) ! AsH 3 adsorption ! Si film growth (second step). The growth thickness and As concentration in the Si film are evaluated with respect to deposition time. As atoms adsorbed on the Si surface after the AsH 3 adsorption step are taken up by the Si layer grown in the second step, and some of these atoms precipitate on the Si film surface. The adsorption of SiH 4 is suppressed owing to the effect of the As atoms precipitated on the Si film surface, resulting in a decrease in the growth rate of the Si film. On the basis of this finding, we construct a surface reaction model by determining the sticking coefficient of SiH 4 from the growth plots in the second step. The Si film growth profiles on submicron holes are analyzed by topography simulation using the surface reaction model, and simulation results are compared with experimentally obtained results.

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“…To increase packing density and device performance, trench isolation technology is used for lateral device isolation (1) or latch-up free CMOS devices (2) and very fast bipolar transistors. Modern DRAMs with 4 Mbit storage capacity and more use three-dimensional trenched capacitor cells (3). The trench technology involves three main steps: etching, filling of the trenches, and etchback of the filling material to the single-crystal silicon.…”

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confidence: 99%

Profile Control Possibilities for a Trench Etch Process Based on Chlorine Chemistry

Crazzolara¹,

Gellrich²

1990

J. Electrochem. Soc.

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For etching trenches in single-crystal silicon, dry etch systems with different chamber geometries and chemistries are used. In this work the influence of the etch parameters and the oxide mask on the trench profile is investigated using a triode reactor system with chlorine as the reactive gas and additions of argon and nitrogen. It is shown that there are several possibilities for adjustment of the trench profile even if a heavily doped buried layer has to be etched. It is also demonstrated that unsymmetrical trenches or even sidewall trenching are caused by an unsuitable oxide mask.

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Depletion trench capacitor technology for megabit level MOS dRAM

Cited by 16 publications

References 4 publications

A study of trenched capacitor structures

A study of trenched capacitor structures

Modeling and Simulation of Arsenic-Doped-Silicon Low-Pressure Chemical Vapor Deposition

Profile Control Possibilities for a Trench Etch Process Based on Chlorine Chemistry

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