2019 Innovations in Power and Advanced Computing Technologies (I-Pact) 2019
DOI: 10.1109/i-pact44901.2019.8960014
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Design and FPGA Implementation of Dual Self-Tuning Filter based Controller for Single Phase Shunt Active Filter

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Cited by 4 publications
(7 citation statements)
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“…at 50 Hz with a total harmonic distortion (THD) of 10.67% while the harmonics, i.e., h = 3, 5, 7, 9, 11, 13, 15, 17 are considered as per EN 50160 standard [16]. The proposed scheme is compared with the single-phase configuration of CSTF-PLL [13] and ESTF-PLL [14] techniques along with a demodulation based PLL [4]. The control parameters for DT-PLL are α = 400, β = 50 and γ = 50.…”
Section: Simulation Resultsmentioning
confidence: 99%
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“…at 50 Hz with a total harmonic distortion (THD) of 10.67% while the harmonics, i.e., h = 3, 5, 7, 9, 11, 13, 15, 17 are considered as per EN 50160 standard [16]. The proposed scheme is compared with the single-phase configuration of CSTF-PLL [13] and ESTF-PLL [14] techniques along with a demodulation based PLL [4]. The control parameters for DT-PLL are α = 400, β = 50 and γ = 50.…”
Section: Simulation Resultsmentioning
confidence: 99%
“…where T w = 2π/ω o is the window length. The harmonic and DC-offset rejection abilities of the proposed STF compared to the well-known CSTF [13] and the extended STF [14] are compared using frequency response analysis (see Fig. 3).…”
Section: Proposed Enhanced Self-tuning Filtermentioning
confidence: 99%
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“…In the Ngo et al, 15 for source current reference generation, SRF theory is utilized along with DFCE, and due to that, computation requirement is high. Moreover, in Bhat et al, 16 DFCE is utilized along with the instantaneous power method. In other works, 1,17 STF (self tuning filter)‐based DFCE is utilized to extract unit template for appropriate reference current generation.…”
Section: Introductionmentioning
confidence: 99%