Design and implementation of a coprocessor for cryptography applications

Royo, A.; Moran, J.; Lopez, J.C.

doi:10.1109/edtc.1997.582361

Cited by 18 publications

(12 citation statements)

References 6 publications

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“…To speed up the multiplication operation, various dedicated multiplier modules were developed in [18,1,14]. These designs operate over a fixed finite field.…”

Section: Scalable Multiplier Architecturementioning

confidence: 99%

“…Various hardware implementations of the Montgomery multiplication algorithm for limited precision operands are also reported [2,16,4]. On the other hand, implementations utilizing high-radix modular multipliers have also been proposed [16,11,18]. Advantages and disadvantages of using high-radix representation have been discussed in [21,20].…”

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

A Scalable and Unified Multiplier Architecture for Finite Fields GF(p) and GF(2m)

Savaş

Tenca

Koç

2000

Cryptographic Hardware and Embedded Systems — CHES 2000

110

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Abstract. We describe a scalable and unified architecture for a Montgomery multiplication module which operates in both types of finite fields GF (p) and GF (2 m ). The unified architecture requires only slightly more area than that of the multiplier architecture for the field GF (p). The multiplier is scalable, which means that a fixed-area multiplication module can handle operands of any size, and also, the wordsize can be selected based on the area and performance requirements. We utilize the concurrency in the Montgomery multiplication operation by employing a pipelining design methodology. The upper limit on the precision of the scalable and unified Montgomery multiplier is dictated only by the available memory to store the operands and internal results, and the module is capable of performing infinite-precision Montgomery multiplication in both types of finite fields.

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“…To speed up the multiplication operation, various dedicated multiplier modules were developed in [18,1,14]. These designs operate over a fixed finite field.…”

Section: Scalable Multiplier Architecturementioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

A Scalable and Unified Multiplier Architecture for Finite Fields GF(p) and GF(2m)

Savaş

Tenca

Koç

2000

Cryptographic Hardware and Embedded Systems — CHES 2000

110

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“…For example, a multiplier designed for 768 bits [13] cannot be immediately used in a system which needs 1,024 bits. The functions performed by such designs are not consistent with the ones required in the larger precision system, and the multiplier must be redesigned.…”

Section: Scalabilitymentioning

confidence: 99%

“…A theoretical investigation of the design tradeoffs for high-radix modular multipliers is given in [15]. An example of a design in radix-4 is shown in [13]. The increase in the radix forces the use of digit multipliers, and therefore more complex designs and longer clock cycle times.…”

Section: Introductionmentioning

confidence: 99%

A Scalable Architecture for Montgomery Nultiplication

Tenca

Koç

1999

Cryptographic Hardware and Embedded Systems

125

133

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Abstract. This paper describes the methodology and design of a scalable Montgomery multiplication module. There is no limitation on the maximum number of bits manipulated by the multiplier, and the selection of the word-size is made according to the available area and/or desired performance. We describe the general view of the new architecture, analyze hardware organization for its parallel computation, and discuss design tradeoffs which are useful to identify the best hardware configuration.

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“…The device was specifically designed for a customer under a Non-Disclosure Agreement. The only publication/documentation on this device is [RML97]. The device was designed specifically for cryptography applications.…”

Section: 'mentioning

confidence: 99%