J Comput Electron
 2023
DOI: 10.1007/s10825-023-02036-6
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Design considerations for engineering $$\hbox {HfS}_2$$ negative capacitance FET through multilayered channel and $$\hbox {Hf}_{1-x}{\hbox {Zr}_{x}}\hbox {O}_2$$/$$\hbox {HfO}_2$$ double-gate stacks: an ab initio and NEGF study

Mayuri Sritharan
1
,
Hyunjae Lee
2
,
Robert K. A. Bennett
3
et al.
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