Design of high-speed parallel arithmetic algorithms and architectures

Abstract

This paper is oriented to algorithm for computing a sum of products realizing a fundamental compound operation multiply and add of high-speed arithmetic. Two new cellular pipelined algorithms nnd architectures (20 and 30) are proposed. The initial data and results are binary signed-digit integers. The multipliers are loaded digit serially, the multiplicands -digit parallelly, the results are produced digit parallelly. The design is performed in terms of cellular technology, based on an original model of distributed computation (Parallel Substitution Algorithm). The time and structural complexity is obtained.