Digest of Papers. 1992 IEEE VLSI Test Symposium
DOI: 10.1109/vtest.1992.232725
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Design of low cost ROM based test generators

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Cited by 12 publications
(3 citation statements)
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“…In general, they can be classified as ROM-based deterministic, algorithmic, exhaustive and pseudo-random. In the first approach, deterministic patterns are stored in a ROM and a counter is used for their addressing, (Edirisooriya & Robinson, 1992). The approach is limited to small test pattern sets.…”
Section: Introductionmentioning
confidence: 99%
“…In general, they can be classified as ROM-based deterministic, algorithmic, exhaustive and pseudo-random. In the first approach, deterministic patterns are stored in a ROM and a counter is used for their addressing, (Edirisooriya & Robinson, 1992). The approach is limited to small test pattern sets.…”
Section: Introductionmentioning
confidence: 99%
“…They can be classified as ROM-based deterministic, algorithmic, exhaustive and pseudo-random. In the first approach, deterministic patterns are stored in a ROM and a counter is used for their addressing, [12]. This approach is limited to small test pattern sets.…”
mentioning
confidence: 99%
“…Usually Read Only Memories (ROMs) are used to store the test patterns. Furthermore several hybrid schemes have been proposed which attempt to exploit favorable features of each of the above schemes[13,14,27].Many compaction schemes have been proposed to reduce the volume of output test data; parity checking [3],…”
mentioning
confidence: 99%