Design Technology to Lower Resistance of Source Line for SGT NOR Flash Memory

Kadowaki, Takuya; Yamakawa, Y.; Nakamura, Hiroki; Kimura, Yasuo; Niwano, Michio; Masuoka, F.

doi:10.1149/ma2007-02/1/21

Meet. Abstr.

2007

DOI: 10.1149/ma2007-02/1/21

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Design Technology to Lower Resistance of Source Line for SGT NOR Flash Memory

Takuya Kadowaki¹,

Y. Yamakawa²,

Hiroki Nakamura³

et al.

Abstract: not Available.

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Design Technology to Lower Resistance of Source Line for SGT NOR Flash Memory

Abstract: not Available.

Cited by 0 publications

References 1 publication

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