Detailed routing with advanced flexibility and in compliance with self-aligned double patterning constraints

Nakajima, Fumito; Kodama, Chikaaki; Ichikawa, Hirotaka; Nakayama, Koichi; Nojima, Shigeki; Kotani, Takayuki; Motomizu, Shoji; Miyamoto, Shingo

doi:10.1117/12.2010644

Cited by 8 publications

(12 citation statements)

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“…Mirsaeedi et al proposed a grid routing method for SADP [8], but how to avoid conflicts during routing process was not well discussed. Even though methods using trim mask or cut mask after SADP process were proposed [9]- [11], the cost of mask and the effect of overlay error must be considered. While, Kodama et al proposed a sophisticated method that generates a pattern that can be manufactured by SADP without using trim and cut mask [7].…”

Section: Introductionmentioning

confidence: 99%

Effective two-dimensional pattern generation for self-aligned double patterning

Ihara

Takahashi

Kodama

2015

2015 IEEE International Symposium on Circuits and Systems (ISCAS)

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In nano-scale systems, design for manufacturability is essentially required. For sub 20 nm technology node, Self-Aligned Double Patterning (SADP) is an important manufacturing technique, and complex two-dimensional patterns are requested to be fabricated by SADP. However all two-dimensional patterns cannot be fabricated by SADP. In this paper, twodimensional patterns that satisfy connection requirements as well as manufacturability by SADP are effectively derived by our proposed approach in which partially pre-colored two-color base grid is used.978-1-4799-8391-9/15/$31.00 ©2015 IEEE

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Section: Introductionmentioning

confidence: 99%

Effective two-dimensional pattern generation for self-aligned double patterning

Ihara

Takahashi

Kodama

2015

2015 IEEE International Symposium on Circuits and Systems (ISCAS)

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“…Some SADP-aware detailed routing algorithms have been proposed for the trim process [2,3,4,10] and for the cut process [11]. Du et al proposed a graph model to capture the decomposition violations [2], and Gao et al performed routing and layout decomposition simultaneously [3].…”

Section: Introductionmentioning

confidence: 99%

“…However, both studies do not consider assistant core patterns during routing, resulting in significant overlays. To the best of our knowledge, only the existing work [11] targets on SADP using the cut process. Nevertheless, the work [11] fails to apply the cut technique to solve odd cycles, and the merging of core patterns and assistant core patterns results in severe overlays.…”

Section: Introductionmentioning

confidence: 99%

“…To the best of our knowledge, only the existing work [11] targets on SADP using the cut process. Nevertheless, the work [11] fails to apply the cut technique to solve odd cycles, and the merging of core patterns and assistant core patterns results in severe overlays. This paper presents the first work that applies the cut technique for solving odd cycles during routing.…”

Section: Introductionmentioning

confidence: 99%

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Overlay-Aware Detailed Routing for Self-Aligned Double Patterning Lithography Using the Cut Process

Liu

Fang

Chang

2014

Proceedings of the 51st Annual Design Automation Conference

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Self-aligned double patterning (SADP) is one of the most promising techniques for sub-20nm technology. Spacer-is-dielectric SADP using a cut process is getting popular because of its higher design flexibility; for example, it can decompose odd cycles without the need of inserting any stitch. This paper presents the first work that applies the cut process for decomposing odd cycles during routing. For SADP, further, overlay control is a critical issue for yield improvement; while published routers can handle only partial overlay scenarios, our work identifies all the scenarios that induce overlays and proposes a novel constraint graph to model all overlays. With the developed techniques, our router can achieve high-quality routing results with significantly fewer overlays (and thus better yields). Compared with three state-of-the-art studies, our algorithm can achieve the best quality and efficiency, with zero cut conflicts, smallest overlay length, highest routability, and fastest running time.

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“…To date, manufacturing-friendly detailed routing studies follow the paradigms of sequential routing [11], [13], [28], [37], [45], [46] and negotiation-congestion-based routing technique [8], [9]. When a router accesses an I/O pin locally, it creates a routing interval pattern on M2 for the net connection as shown in Fig.…”

Section: Pin Access Planningmentioning

confidence: 99%

Toward Unidirectional Routing Closure in Advanced Technology Nodes

Pan

2017

IPSJ Transactions on System LSI Design Methodology

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Abstract:In advanced technology nodes, unidirectional layout is strongly preferred for high-density metal layers for better manufacturability. The lithography printing of unidirectional layout can be tightly controlled with illumination source optimization and resolution enhancement techniques. Meanwhile, with the unidirectional layout, self-aligned double and quadruple patterning can be applied to achieve finer pitches beyond the resolutions limits of 193 nm lithography tools. However, unidirectional layout style introduces significant impacts on the physical design flow. Notably, unidirectional routing limits the standard cell pin accessibility, which makes manual cell layout design and optimization more and more challenging under modern standard cell architecture. In the routing phase, routing densities and resource competitions on lower metal layers are becoming increasingly high, where intelligent approaches are needed to resolve routing resource competitions for unidirectional routing closure. Moreover, post-routing optimization is inevitable to avoid significant engineering-changing-efforts for unidirectional routing under advanced manufacturing constraints. In this paper, we present a holistic approach, including standard pin access evaluation/optimization, pin access and routing co-optimization and post-routing optimization, to enable unidirectional routing closure in advanced technology nodes.

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Detailed routing with advanced flexibility and in compliance with self-aligned double patterning constraints

Cited by 8 publications

References 0 publications

Effective two-dimensional pattern generation for self-aligned double patterning

Effective two-dimensional pattern generation for self-aligned double patterning

Overlay-Aware Detailed Routing for Self-Aligned Double Patterning Lithography Using the Cut Process

Toward Unidirectional Routing Closure in Advanced Technology Nodes

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