Diagnostic techniques for the IBM S/390 600 MHz G5 microprocessor

Song, Peilin; Motika, Franco; Knebel, D.R.; Rizzolo, Richard; Kusko, M.P.; Lee, J.; McManus, M.

doi:10.1109/test.1999.805841

Cited by 26 publications

(22 citation statements)

References 14 publications

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“…PICA has been used to measure the electrical behavior of chips that are being fabricated today [38], [39], [51]. PICA waveforms have already been obtained on subquarter micrometer CMOS technologies operating at 1.5 V and lower [45].…”

Section: Discussionmentioning

confidence: 99%

“…Failure analysis and debugging of future chip designs are likely to require optimal use of both electrical test techniques and external measurement techniques like LVP and PICA. In particular, applications of PICA to commercial chips have relied on electrical means to identify the existence of failures, software-and tester-based diagnostics to localize the fault to regions of the chip containing several thousand gates, and then PICA to identify the precise location and character of the fault [39], [51].…”

Section: Discussionmentioning

confidence: 99%

“…13. Schematic diagram of an I/O circuit in a microprocessor suspected of causing timing failures on chip-to-chip paths [39], [51].…”

Section: B Use Of Pica For Backside Characterizationmentioning

confidence: 99%

“…Fig. 13 [39], [51] is a schematic of an I/O circuit in an IBM S/390 G5 microprocessor. The microprocessor is a 600-MHz part based on a 0.25-m process.…”

Section: B Use Of Pica For Backside Characterizationmentioning

confidence: 99%

“…The SEM was guided directly to the defect by the PICA data. The ability to correlate emission data with circuit timing information is a critical element that sets PICA apart from static-emission analysis [39], [51].…”

Section: B Use Of Pica For Backside Characterizationmentioning

confidence: 99%

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Time-resolved optical characterization of electrical activity in integrated circuits

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Section: Discussionmentioning

confidence: 99%

Section: Discussionmentioning

confidence: 99%

“…13. Schematic diagram of an I/O circuit in a microprocessor suspected of causing timing failures on chip-to-chip paths [39], [51].…”

Section: B Use Of Pica For Backside Characterizationmentioning

confidence: 99%

“…Fig. 13 [39], [51] is a schematic of an I/O circuit in an IBM S/390 G5 microprocessor. The microprocessor is a 600-MHz part based on a 0.25-m process.…”

Section: B Use Of Pica For Backside Characterizationmentioning

confidence: 99%

Section: B Use Of Pica For Backside Characterizationmentioning

confidence: 99%

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Scan chain diagnosis is essential to solving yield-reduction problem caused by the miniaturization of manufacturing process. The accurate diagnosis of scan chain faults that frequently occur in the initial process is vital for rapidly improving yield. Moreover, the importance of scan chain diagnosis with a high resolution for the multiple faults is increasing because multiple faults occur in the early stages of the process, further increasing the cost of physical failure analysis. Although multiple faults can be diagnosed with existing methods, a high diagnostic resolution is difficult to achieve in the early stages of the process (where many faults occur) due to the rapid increase in the number of diagnosed fault candidates as the number of actual faults in the circuit increases. In this paper, a novel reconfigurable scan architecture that reconfigures the diagnosis paths and a test algorithm that uses this scan architecture are proposed to reduce the number of diagnosed fault candidates in the scan chain diagnosis with multiple circuit faults. Experimental results indicate that the proposed method achieves the higher diagnostic resolution for multiple faults than conventional methods. In addition, the proposed method reduces the routing overhead by scan partitioning.

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Diagnostic techniques for the IBM S/390 600 MHz G5 microprocessor

Cited by 26 publications

References 14 publications

Time-resolved optical characterization of electrical activity in integrated circuits

Time-resolved optical characterization of electrical activity in integrated circuits

Logic Diagnosis

Reconfigurable Scan Architecture for High Diagnostic Resolution

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