Distortion in analog VLSI networks for image filtering

SUMMARYResistive grids are commonly used in neuromorphic very large-scale integration (VLSI) designs for image smoothing and signal aggregation. Because mismatch is inevitable in VLSI chips, one reason that resistive grids are attractive is that their output is robust to mismatch in the component values. Here, we examine relative sensitivity of different resistive grid designs that differ depending upon whether the input and output are represented by current or voltage. Our analysis reveals that a mixed-mode design, where the input is represented by current but the output is represented by voltage, is less sensitive to mismatch when the amount of smoothing is large. On the other hand, when little smoothing is desired, pure voltage-mode and current-mode designs are preferred. From the point of view of mismatch sensitivity, there is little difference between the two pure-mode designs. Our analysis also reveals that the difference in mismatch sensitivity is due to the vertical resistors, which are the most sensitive to mismatch in all the three designs studied.

The effect of mismatch in current‐ versus voltage‐mode resistive grids

Shi

2008

On the implementation of linear diffusion in transconductance‐based cellular nonlinear networks

Fernández-Berni

Carmona-Galán

2008

SUMMARYIn theory, cellular nonlinear networks (CNN) are well capable of implementing discrete-space linear diffusion by means of the appropriate templates. In practice, good results have not been demonstrated with transconductance-based circuits. In this paper, we prove that inherent mismatch to very large scale integration implementation is the reason. Although previous works consider that the small perturbations of the network parameters lead to small deviations from the ideal behavior, we consider that this is over optimistic. When interactions between nodes are supported by unidirectional building blocks, originally balanced current paths are realized by mismatched elements. In the case of linear diffusion, the singular location of natural frequencies of the system implies that a small perturbation of balanced current paths renders qualitatively different network dynamics. We analyze and compare a set of linear templates performing unconstrained and constrained linear diffusion in transconductance-based CNN hardware. Several numerical examples are also presented to visualize the consequences of mismatch on the processing. Finally, in order to emphasize the importance of having balanced current paths, we tested the influence of mismatch in a grid built with MOS transistors. In spite of their nonlinearity, the resulting network is much more robust to mismatch. This last result coincides with previous studies.

All‐MOS implementation of RC networks for time‐controlled Gaussian spatial filtering

Fernández-Berni

Carmona-Galán

2011

SUMMARYThis paper addresses the design and VLSI implementation of MOS-based RC networks capable of performing time-controlled Gaussian filtering. In these networks, all the resistors are substituted one by one by a single MOS transistor biased in the ohmic region. The design of this elementary transistor is carefully realized according to the value of the ideal resistor to be emulated. For a prescribed signal range, the MOSFET in triode region delivers an interval of instantaneous resistance values. We demonstrate that, for the elementary 2-node network, establishing the design equation at a particular point within this interval guarantees minimum error. This equation is then corroborated for networks of arbitrary size by analysing them from a stochastic point of view. Following the design methodology proposed, the error committed by a MOS-based grid when compared to its equivalent ideal RC network is, despite the intrinsic nonlinearities of the transistors, below 1% even under mismatch conditions of 10%. In terms of image processing, this error hardly affects the outcome, which is perceptually equivalent to that of the ideal network. These results, extracted from simulation, are verified in a prototype vision chip with QCIF resolution manufactured in the AMS 0.35µm CMOS-OPTO process. This prototype incorporates a focal-plane MOS-based RC network which performs fully-programmable Gaussian filtering.