Dual band CMOS LNA design with current reuse topology

Amor, M. Ben; Fakhfakh, Ahmed; Mnif, Hassène; Loulou, Mourad

doi:10.1080/00207210701827863

Cited by 21 publications

(5 citation statements)

References 11 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…A variant of folded cascode has been tried in [13]. Circuit used in [14] is a Dual-Band Concurrent current reuse CMOS LNA. A modified form of basic cascode is the subject of investigation in [15].…”

Section: Exhaustive Searchmentioning

confidence: 99%

On the intelligent components geometry design of a current reuse folded cascode concurrent dual-band CMOS LNA

Fathianpour

Seyedtabaii

2013

2013 21st Iranian Conference on Electrical Engineering (ICEE)

View full text Add to dashboard Cite

In this paper, an optimized design procedure based on evolutionary algorithms for automatic synthesis of a current reuse folded cascode dual-band concurrent fully integrated lownoise amplifiers (LNA) targeted to 802.16d @ 3.5GHz and 802.11b, g @ 2.4GHz standards is discussed. Algorithm is intended to compute the circuit elements geometry and bias levels capable of maintaining the best level of gain, input matching, output matching and power consumption. The genetic algorithm optimization engine is developed in MATLAB environment and performance evaluation in 0.18µm RF CMOS TSMC technology is ceded to HSPICE. Results indicate that the automated scheme well renders the desired circuit in an acceptable computation time, otherwise, either tremendous manual trial and errors or an astronomical cycles of exhaustive search is required.

show abstract

Section: Exhaustive Searchmentioning

confidence: 99%

On the intelligent components geometry design of a current reuse folded cascode concurrent dual-band CMOS LNA

Fathianpour

Seyedtabaii

2013

2013 21st Iranian Conference on Electrical Engineering (ICEE)

View full text Add to dashboard Cite

show abstract

“…F. Bruccoleri and E. A. M. klumperink propose Feedback structure to attain noise figure only 1.9 dB in LNA design [2]. To reduce the power consumption, M. Ben Amor and A. Fakhfakh et al propose current-reused structure in LNA design [3]. N. G. Myoung and H. S. Kang et al propose unbalanced mixer architecture to achieve high conversion gain [4].…”

Section: Introductionmentioning

confidence: 97%

A 1.04 mm<sup>2</sup>, low-power front-end circuit of receiver in 0.18μm CMOS for IEEE 802.11a application

Lin

You

et al. 2014

2014 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)

View full text Add to dashboard Cite

An integrated CMOS front-end circuit of receiver according to the IEEE 802.11a standard is presented in this paper. The front-end circuit comprises low noise amplifier (LNA), active balun, voltage control oscillator (VCO), and source pumped mixer. The proposed source pumped mixer can achieve high linearity and high gain performances. When integrated in a 0.18 μm CMOS technology, the front-end circuit exhibits an area of only 1.04 mm 2 . The proposed front-end circuit achieves measured conversion gain of 19dB, input third-order intercept point (IIP3) of -11 dBm, VCO tuning range of 780 MHz and a phase noise of -108 dBc/Hz at 1-MHz offset frequency under consuming power of 24.5 mW from 1.8V supply voltage.

show abstract

“…The fourth generation (4G) wireless systems are under development to satisfy such demands by adopting various advanced technologies. CMOS technology is one of the key technologies to not only provide high performance but also reduce manufacturing costs [2]. Recently, there has been growing demand for multiple services within a single mobile terminal.…”

Section: Introductionmentioning

confidence: 99%

“…However, it is difficult to implement within the limited space available in mobile terminals due to the high isolation requirement between antenna elements. To improve the isolation between two antenna elements, various MIMO antenna approaches have been introduced to implement systems utilizing a ground with a slit and/or stub [2][3][4], a jointed radiator [5] or jointed shorting [6], and a resonator [7]. However, those methods cannot provide good isolation performance at frequency bands below 1 GHz.…”

Section: Introductionmentioning

confidence: 99%

A concurrent triple‐band CMOS low noise amplifier for fourth generation applications

Jang

Choi

2010

Micro & Optical Tech Letters

View full text Add to dashboard Cite

In this study, a concurrent triple-band low noise amplifier (LNA) is designed for long term evolution (LTE), Mobile-WiMAX (MWiMAX), and WiMAX services. The main topology of the proposed LNA is a cascode architecture with source degeneration using shunt resistive feedback topology for the triple-resonance characteristic. The LNA is designed using a Taiwan Semiconduction Company (TSMC) 0.18 lm radio frequency CMOS process. To obtain the necessary gains over the operating frequency bands, a series LC branch is added in parallel with an inductor at the drain load of a single band LNA. The peak gains at LTE, M-WiMAX, and WiMAX bands are 17.6, 14.7, and 14.5 dB, respectively, whereas dissipating 8 mA from a 1.4 V supply voltage. The average noise figure over the three operating frequency bands is 4.5 dB.

show abstract

Dual band CMOS LNA design with current reuse topology

Cited by 21 publications

References 11 publications

On the intelligent components geometry design of a current reuse folded cascode concurrent dual-band CMOS LNA

On the intelligent components geometry design of a current reuse folded cascode concurrent dual-band CMOS LNA

A 1.04 mm<sup>2</sup>, low-power front-end circuit of receiver in 0.18μm CMOS for IEEE 802.11a application

A concurrent triple‐band CMOS low noise amplifier for fourth generation applications

Contact Info

Product

Resources

About

Dual band CMOS LNA design with current reuse topology

Cited by 21 publications

References 11 publications

On the intelligent components geometry design of a current reuse folded cascode concurrent dual-band CMOS LNA

On the intelligent components geometry design of a current reuse folded cascode concurrent dual-band CMOS LNA

A 1.04 mm<sup>2</sup>, low-power front-end circuit of receiver in 0.18&#x03BC;m CMOS for IEEE 802.11a application

A concurrent triple‐band CMOS low noise amplifier for fourth generation applications

Contact Info

Product

Resources

About

A 1.04 mm<sup>2</sup>, low-power front-end circuit of receiver in 0.18μm CMOS for IEEE 802.11a application