Editorial for the Special Issue on Advanced Interconnect and Packaging

Zhao, Wen‐Sheng

doi:10.3390/mi14010171

Cited by 1 publication

(1 citation statement)

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“…A 3D packaged memory device with a large memory capacity, fast transmission efficiency, and low power consumption has become a powerful product that follows Moore's Law [149][150][151]. Pins, chips, and solder joints in 3D packaged memory devices are prone to failure under the conditions of vibration, shock, and temperature change, ultimately resulting in the failure of the device and even the system.…”

Section: Discussionmentioning

confidence: 99%

Survey of Reliability Research on 3D Packaged Memory

Zhou

et al. 2023

Electronics

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As the core carrier of information storage, a semiconductor memory device is a basic product with a large volume that is widespread in the integrated circuit industry. With the rapid development of semiconductor manufacturing processes and materials, the internal structure of memory has gradually shifted from a 2D planar packaging structure to a 3D packaging structure to meet industry demands for high-frequency, high-speed, and large-capacity devices with low power consumption. However, advanced 3D packaging technology can pose some reliability risks, making devices prone to failure, especially when used in harsh environmental conditions, including temperature changes, high temperature and humidity levels, and mechanical stress. In this paper, the authors introduce the typical structure characteristics of 3D packaged memory; analyze the reasons for device failure caused by stress; summarize current research methods that utilize temperature, mechanical and hygrothermal theories, and failure models; and present future challenges and directions regarding the reliability research of 3D packaged memory.

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Section: Discussionmentioning

confidence: 99%