Editorial to special issue on energy efficient architectures for embedded systems

Abstract

In the last decades, a significant boost in embedded computing systems performance has been observed in several different domains, mostly due to technology scaling and to the ever increasing exploitation of parallel processing architectures [1].However, although conventional approaches relying on homogeneous/heterogeneous chip-multiprocessor aggregates already allow achieving a significant performance level [2], important compromises are necessary in order to cope with the strict energy efficiency requirements present in many embedded application domains (e.g. mobile, battery supplied and hand-held devices) [3].As a consequence, energy efficiency is gradually becoming one fundamental constraint and requisite for embedded systems design, often requiring the adoption of new technologies [4,5] and micro-architecture design approaches [6][7][8][9][10].This special issue (SI) of the EURASIP Journal on Embedded Systems (Springer) entitled "Energy Efficient Architectures for Embedded Systems" is mainly focused on new design and development trends of energy efficient processing architectures for embedded systems. The collection of papers presented here emphasizes several aspects of this research domain, including not only architectures and specific design methods but also more technological aspects related to micro-architecture design, memory hierarchies, communication mechanisms and tools/algorithms for energy/power management and control.The call for papers resulted in nine manuscript submissions. For each submission, at least two reviewers examined its quality, together with the guest editors and the editor-in-chief. Finally, four papers were selected for publication that cover the following three prominent topics in embedded system design: computer microarchitectures for energy efficiency, energy/power models *Correspondence: nuno.roma@inesc-id.pt 1 INESC-ID, Instituto Superior Técnico, Universidade de Lisboa, Rua Alves Redol, 9, 1000-029 Lisboa, Portugal Full list of author information is available at the end of the article and management strategies, and energy-efficient memory hierarchy subsystems.The paper entitled "A hybrid fixed-function and microprocessor solution for high-throughput broad-phase collision detection", by Muiris Woulfe and Michael Manzke, presents a hybrid processing system spanning a fixedfunction microarchitecture and a general-purpose microprocessor, designed to increase the throughput and reduce the power dissipation of collision detection relative to what can be achieved using CPUs or GPUs alone. The primary component is one of two novel microarchitectures designed to perform the principal elements of broad-phase collision detection. Both microarchitectures consist of processing pipelines comprising a plurality of memories, which rearrange the input into a format that maximizes parallelism and bandwidth. The two microarchitectures are combined with the remainder of the system through an original method for sharing data between a ray tracer and the collision-detection microarchitectures to m...