“…The main issue is that SMD inductor values are limited for a given current. Consequently, as shown by the simulations, in this study an optimized PCB configuration including a double drain feeder is used to increase the LFR by 20%, while simultaneously reducing the impedance level frequencies below the resonance, which is a significant improvement and has a positive impact on efficiency and linearity [31]. Fig.…”
This paper presents a fully integrated three-way Doherty architecture to address the challenges of 5G applications using laterally-diffused metal-oxide semiconductor (LDMOS) technology. By using the so-called CDS cancelation method for the Doherty combiner design, a wideband impedance transformation is achieved, that combined with the three-way Doherty power amplifier (DPA) architecture allows for high efficiency in deep back-off, with a reduced load modulation for high bandwidth. Throughout this paper, the design approach and realization are described, while multiple critical design challenges will be addressed such as low frequency drain resonance optimization, impact of in-package coupling effects, and linearity versus efficiency tradeoff. Two state-of-the-art three-way fully integrated LDMOS DPA monolithic microwave integrated circuit (MMICs) are presented to demonstrate how these measures have been successfully applied to different power amplifier (PA) line-up components for 5G base station systems. First, a 60 W 1.8–2.2 GHz multi-stage device for driver application in true dual-band operation is presented. The circuit design pays special attention to extended PA video bandwidth thanks to integrated passive device. After digital pre-distortion (DPD) in dual-band operation, this highly linear device achieves an outstanding adjacent channel leakage ratio (ACLR) of −56 dBc for a 2cLTE 20 MHz 8 dB peak-to-average ratio signal spaced by 345 MHz, thus 385 MHz instantaneous bandwidth (IBW), with 29% efficiency at 35 dBm, 12 dB output back-off (OBO). Second, the simulation and measurement results of a 55 W 2.6 GHz multi-stage DPA for massive-MIMO final stage application are presented, which yields an excellent linearized efficiency of 49% using a 200 MHz 10cLTE signal with an ACLR lower than −47.5 dBc. For 8cLTE 20 MHz (160 MHz IBW), the device yields 50% efficiency with −50.7 dBc ACLR linearized after DPD. The achieved efficiency is well comparable to published GaN DPAs. These results were achieved by improved simulation techniques to minimize frequency dispersion and thus allow high efficiency operation over wide bandwidth. Both devices show that LDMOS is not only a mature technology which allows those PAs to be reliable and low-cost for mass production in very compact packages, but also provide best-in-class RF performance according to the needs of 5G base station systems.
“…The main issue is that SMD inductor values are limited for a given current. Consequently, as shown by the simulations, in this study an optimized PCB configuration including a double drain feeder is used to increase the LFR by 20%, while simultaneously reducing the impedance level frequencies below the resonance, which is a significant improvement and has a positive impact on efficiency and linearity [31]. Fig.…”
This paper presents a fully integrated three-way Doherty architecture to address the challenges of 5G applications using laterally-diffused metal-oxide semiconductor (LDMOS) technology. By using the so-called CDS cancelation method for the Doherty combiner design, a wideband impedance transformation is achieved, that combined with the three-way Doherty power amplifier (DPA) architecture allows for high efficiency in deep back-off, with a reduced load modulation for high bandwidth. Throughout this paper, the design approach and realization are described, while multiple critical design challenges will be addressed such as low frequency drain resonance optimization, impact of in-package coupling effects, and linearity versus efficiency tradeoff. Two state-of-the-art three-way fully integrated LDMOS DPA monolithic microwave integrated circuit (MMICs) are presented to demonstrate how these measures have been successfully applied to different power amplifier (PA) line-up components for 5G base station systems. First, a 60 W 1.8–2.2 GHz multi-stage device for driver application in true dual-band operation is presented. The circuit design pays special attention to extended PA video bandwidth thanks to integrated passive device. After digital pre-distortion (DPD) in dual-band operation, this highly linear device achieves an outstanding adjacent channel leakage ratio (ACLR) of −56 dBc for a 2cLTE 20 MHz 8 dB peak-to-average ratio signal spaced by 345 MHz, thus 385 MHz instantaneous bandwidth (IBW), with 29% efficiency at 35 dBm, 12 dB output back-off (OBO). Second, the simulation and measurement results of a 55 W 2.6 GHz multi-stage DPA for massive-MIMO final stage application are presented, which yields an excellent linearized efficiency of 49% using a 200 MHz 10cLTE signal with an ACLR lower than −47.5 dBc. For 8cLTE 20 MHz (160 MHz IBW), the device yields 50% efficiency with −50.7 dBc ACLR linearized after DPD. The achieved efficiency is well comparable to published GaN DPAs. These results were achieved by improved simulation techniques to minimize frequency dispersion and thus allow high efficiency operation over wide bandwidth. Both devices show that LDMOS is not only a mature technology which allows those PAs to be reliable and low-cost for mass production in very compact packages, but also provide best-in-class RF performance according to the needs of 5G base station systems.
“…This allows the PA to be designed primarily with broad band operation in mind as the efficiency is ensured by the DPS; it does however move the complexity towards the DPS. One critical parameter in ET is the baseband impedance the DPS presents to the PA within the modulation bandwidth, as it has a direct impact on the linearity of the PA [5], [6]. In PAs using constant, static supply voltages, the bias network can be designed to provide a wideband short circuit over the baseband frequency range [6], in ET PAs however, the bias network needs to allow baseband frequencies to pass unhindered, to allow the modulation of the supply voltage at those frequencies.…”
Envelope tracking is one of the promising technologies for 5G power amplifiers, providing high power efficiency over a wide output power range by modulating the supply voltage. Although the baseband impedance, the output impedance of the supply modulator, plays a crucial role in the linearity of the PA, it is often not measured or considered during the modulator design. This paper presents a new, simplified approach to characterising this impedance using a PA with a simple multi-tone modulation as a load. It describes the measurement setup and verifies the results by characterising the baseband impedance of a state-of-the-art buck converter and comparing this to its static model. The results demonstrate that multi-tone signals and complex modulations yield comparable results and are both suitable for measuring and modelling the baseband impedance. This shows that using simple multi-tone measurements and basic equipment, the full static impedance characteristic can be obtained.
“…Recently, Nunes et al [12] reported a theoretical study of the efficiency degradation induced by the output baseband impedance terminations. However, the input baseband impedance impact on the wideband PA's efficiency is still largely unexplored and commonly ignored during the design stage.…”
This article presents a theoretical explanation of the efficiency degradation in wideband radio frequency power amplifiers (RFPAs) under concurrent dual-band operation that is still visible after eliminating all known causes related to the output matching network (OMN). First, the origin of this degradation, identified by the reduction of the PA's efficiency and linearity, is traced to the input baseband impedance terminations. Then, a theoretical model that describes the phenomenon and qualitatively predicts the efficiency variation under concurrent dual-band operation is presented using a simple model based on two-tone excitation. Finally, the proposed explanation is confirmed by comparing the efficiency performance of two 30-W GaN RFPAs of distinct instantaneous bandwidth determined by different input video-bandwidth terminations, under two-tone and concurrent dual-band operation. This article shows that, in addition to the adequate OMN design, an optimal input baseband impedance profile is also an important design constraint needed to keep the efficiency and linearity performance of RFPAs, for scenarios that require a wide instantaneous bandwidth.
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