Efficient Breadth First Search on Multi-GPU Systems Using GPU-Centric OpenSHMEM

Potluri, Sreeram; Goswami, Anshuman; Venkata, Manjunath Gorentla; Imam, Neena

doi:10.1007/978-3-319-73814-7_6

Cited by 2 publications

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“…Meeting this challenge, in recent years, GPU vendors have provided higher bandwidth rates and lower delays to mitigate the transfer bottleneck. NVIDIA recently introduced a high‐performance interconnect technology called NVLink, 14,18,19 which provides significant performance benefits for GPU‐to‐GPU communications 6,7,20,21 . NVLink 2.0 increases the bandwidth to 25 GB/s per link per direction.…”

Section: Introductionmentioning

confidence: 99%

“…NVIDIA recently introduced a high-performance interconnect technology called NVLink, 14,18,19 which provides significant performance benefits for GPU-to-GPU communications. 6,7,20,21 NVLink 2.0 increases the bandwidth to 25 GB/s per link per direction. Being primarily developed as a GPU-GPU interconnect, it allows faster GPU-GPU transfers-six links per GPU gives a theoretical peak bandwidth of 150 GB/s per direction.…”

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confidence: 99%

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Single‐ and multi‐GPU computing on NVIDIA‐ and AMD‐based server platforms for solidification modeling application

Halbiniak,

Meyer,

Rojek

2023

Concurrency and Computation

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SummaryThis work explores the performance of single‐ and multi‐GPU computing on state‐of‐the‐art NVIDIA‐ and AMD‐based server‐class hardware using various programming interfaces to accelerate a real‐world scientific application for solidification modeling based on the phase‐field method. The main computations of this memory‐bound application correspond to 20 stencils computed across grid nodes. We investigate the application's scalability for two basic schemes of organizing computation: without and with hiding data transfers behind computation, combined with using either peer‐to‐peer inter‐GPU data transfers through NVIDIA NVLink and AMD Infinity interconnects or communication over the PCIe and main memory. Among the studied programming interfaces is CUDA, HIP, and OpenMP Accelerator Model. While the first two are designed to write the codes for a specific hardware platform, OpenMP enables code portability between NVIDIA and AMD GPUs. The resulting performance is experimentally assessed on computing platforms containing NVIDIA V100 (up to 8 GPUs) and A100 (one GPU), as well as AMD MI210 (one device) and MI250 (up to 8 logical GPUs).

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Section: Introductionmentioning

confidence: 99%