2021
DOI: 10.1109/tvlsi.2021.3106858
|View full text |Cite
|
Sign up to set email alerts
|

EFFORT: A Comprehensive Technique to Tackle Timing Violations and Improve Energy Efficiency of Near-Threshold Tensor Processing Units

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
1

Citation Types

0
1
0

Year Published

2022
2022
2024
2024

Publication Types

Select...
3
2

Relationship

0
5

Authors

Journals

citations
Cited by 8 publications
(1 citation statement)
references
References 38 publications
0
1
0
Order By: Relevance
“…Hardware based schemes consist of circuit level augmentations or modifications. These are included at design time to estimate the timing slack or to detect timing errors in-situ [12].…”
Section: A Hardware Based Schemesmentioning
confidence: 99%