2015
DOI: 10.1016/j.tsf.2014.12.042
|View full text |Cite
|
Sign up to set email alerts
|

Electron backscatter diffraction characterization of electrolytic Cu deposition in the blind-hole structure: Current density effect

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
1
1

Citation Types

1
11
0

Year Published

2015
2015
2023
2023

Publication Types

Select...
8

Relationship

0
8

Authors

Journals

citations
Cited by 19 publications
(12 citation statements)
references
References 33 publications
1
11
0
Order By: Relevance
“…In the Cu filling process, a concave Cu surface is usually created above the via-structure due to the difference in the Cu deposition rate between surface Cu and the via upper region [4][5][6], as illustrated in Fig. 1(a)-(b).…”
Section: Introductionmentioning
confidence: 99%
See 1 more Smart Citation
“…In the Cu filling process, a concave Cu surface is usually created above the via-structure due to the difference in the Cu deposition rate between surface Cu and the via upper region [4][5][6], as illustrated in Fig. 1(a)-(b).…”
Section: Introductionmentioning
confidence: 99%
“…4(a)-(d). The <111>||ND (deposition direction) preferred crystallographic orientation had also been found in the electrolytic Cu deposition of the through-/blind-hole structures[6][7][8][9]. Based on surface energy minimization, [111] is the preferred direction for Cu electrodeposition because the close-packed plane of the face-centered cubic (FCC) Cu is {111}[23][24].…”
mentioning
confidence: 99%
“…Electroplated Cu is commonly used for the filling of blind-holes (BHs)/vias in high-density interconnections (HDIs) in printed circuit boards (PCBs) and integrated circuits (ICs) because of its high electrical and thermal conductivities, good signal performance, and efficient utilization of packaging space (e.g., via-in-pad design). [1][2][3][4][5] The Cu deposition profile and its crystallographic microstructure in BH/via structures might govern the electrical, thermal, and mechanical properties of the Cu interconnections, 1,[5][6][7][8][9][10][11][12][13][14][15][16][17] affecting the overall HDI-PCB/IC-package reliability. For instance, the formation of voids/seams in BH Cu fillings inevitably traps some electrolyte inside, which might ultimately degrade the thermomechanical reliability of Cu interconnects.…”
mentioning
confidence: 99%
“…KVs are also affected by electrodeposition constraints (current density, plating additives, thickness, and surface roughness) [50][51][52] and substrate morphology. [53,54] Researchers have not spotted any voids in high-conductivity and oxygen-free substrate joints.…”
Section: Nucleation Of Kvsmentioning
confidence: 99%