eLine100: A front end ASIC for LCLS detectors in low noise applications

Abstract

Abstract-eLine100 is a fast-frame 96-channel readout ASIC for SLAC Linac Coherent Light Source (LCLS) detectors. The circuit has been designed to integrate the charge from highcapacitance 2D sensors with rolling shutter and 1D sensors. It has a noise floor of 55e -+ 8e -/pF r.m.s at room temperature and it is suitable for applications requiring resolutions on the order of 100e -r.m.s and signals up to 120 photons/pixel/pulse at 8keV (260ke -). 2D sensors with a rolling shutter like the X-ray Charge Pump Sensor (XCPS), for which the ASIC has been optimized, present many pixels which are bussed on the same readout line. This characteristic, together with the fixed LCLS beam period, impose limitations on the time available for the read out of each pixel. Given the periodic structure of the LCLS beam, the ASIC developed for this application is a time-variant system, providing a two-stage low-noise charge integration, filtering, correlated double sampling and a processing speed of up to 250k pixel/s on each channel. To cope with the required input range, a charge pump scheme has been implemented using an asynchronous zero-balance measurement method. It provides on-chip 1-bit coarse analog-to-digital conversion of the integrated charge. The residual charge is sampled using correlated double sampling into an analog memory, multiplexed and measured with the required resolution by an external ADC. In this paper, the ASIC architecture and performances of the final release are presented.

The Cornell-SLAC pixel array detector at LCLS

“…Almost a petabyte of data has been recorded with CSPAD cameras. The SLAC detector and ASIC groups are applying the experience gained to build new cameras [11] for LCLS and LCLS-II.…”

eLine10k: A High Dynamic Range Front-End ASIC for LCLS Detectors

“…For applications, like XAMPS, the switch could be a FET. In other cases, the collecting node could be isolated from the collection area by means of controllable potential barriers (XCPS [1,12]). The "switches" associated with the pixels in a column are connected to the same readout line, while the gates (called transfer gates) of those associated to the pixels in a row are activated simultaneously.…”

“…1) has been the first of a new class "eLine" of multichannel time-variant integrating front-end Application Specific Integrated Circuits (ASIC) that SLAC has developed for the Linac Coherent Light Source (LCLS). The class is composed of two front-end ASICs, one designed for high-dynamic range applications (eLine10k) and one designed for ultra-low noise applications (eLine100 [1]). The class also include a switcher ASIC (sLine [2]) used to control the operation of column-parallel readout 2D sensors with rolling shutter, such as the X-ray Active Matrix Pixel Sensor (XAMPS), developed at Brookhaven National Laboratory.…”

sLine: A High Voltage Switcher ASIC for LCLS Detectors with Rolling Shutter

“…1) is a high voltage switcher Application Specific Integrated Circuit (ASIC) that complements the eLine class [4][5][6] of multichannel time-variant integrating front-end ASICs that SLAC has developed for the readout of high capacitance 2D sensors with rolling shutter, and for 1D strip sensors. The class is composed of two front-end ASICs, one designed for high-dynamic range applications (eLine10k [4][5]) and one designed for ultra-low noise applications (eLine100 [6]). Optimized for the XCPS, each channel of the ASIC can independently operate two control lines replicating low voltage control patterns at high voltages.…”