Enabling High-Performance Heterogeneous Integration via Interface Standards, IP Reuse, and Modular Design

Abstract

DARPA is leading a new thrust to leverage mainstream semiconductor design approaches to enable the rapid and cost-effective integration of heterogeneous device technologies. This represents a leap ahead beyond the monolithic silicon approach that has served the semiconductor industry well, but which now creates prohibitive cost and design issues at leading-edge nodes, as well as performance constraints without the benefits of broad device technology options. DARPA's Common Heterogeneous Integration and IP Reuse Strategies (CHIPS) program will develop interface standards, IP reuse methodologies, and modular design approaches with the goal of making heterogeneous integration as straightforward as printed circuit board design and assembly, without compromising device performance. An overview of the program's vision, goals, and progress to date is presented here.