Proceedings of the 18th ACM Great Lakes Symposium on VLSI 2008
DOI: 10.1145/1366110.1366149
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Energy saving for memory with loop scheduling and prefetching

Abstract: Many high-performance DSP processors employ multi-module onchip memory to improve performance and power consumption. This architectural feature supports higher memory bandwidth by allowing multiple data memory accesses to be executed in parallel. However, making effective use of multiple memory modules remains difficult, considering the combined effect of performance and power requirement. This paper studies the scheduling and assignment problem that minimizes the total energy while satisfying performance for … Show more

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“…Depending on the applications, the sensors are deployed randomly or using a systematic approach to gather the information from the environment [4]. Making effective use of multiple memory modules remains difficult, considering the combined effect of performance and power requirement [5]. Because fetching and synchronizing the data in remote node is a high energy consuming procedure, caching the data in the memory media of local node can effectively decrease the energy consumption on data communication.…”
Section: Introductionmentioning
confidence: 99%
“…Depending on the applications, the sensors are deployed randomly or using a systematic approach to gather the information from the environment [4]. Making effective use of multiple memory modules remains difficult, considering the combined effect of performance and power requirement [5]. Because fetching and synchronizing the data in remote node is a high energy consuming procedure, caching the data in the memory media of local node can effectively decrease the energy consumption on data communication.…”
Section: Introductionmentioning
confidence: 99%