Enhancing Resource Management Through Prediction-Based Policies

Navarro, Antoni; Lorenzon, Arthur F.; Ayguadé, Eduard; Beltrán, Vicenç

doi:10.1007/978-3-030-57675-2_31

Cited by 3 publications

(2 citation statements)

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“…Considering the results shown in the evaluation, the heuristic meets our criteria and tackles all the exposed challenges for the evaluated benchmarks. For applications with more sophisticated access patterns, Nanos6 provides a monitoring framework Navarro et al (2020) that could be used in the future to develop more sophisticated heuristics.…”

Section: Nanos6 Numa-aware Scheduling Systemmentioning

confidence: 99%

Mitigating the NUMA effect on task-based runtime systems

et al. 2023

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Processors with multiple sockets or chiplets are becoming more conventional. These kinds of processors usually expose a single shared address space. However, due to hardware restrictions, they adopt a NUMA approach, where each processor accesses local memory faster than remote memories. Reducing data motion is crucial to improve the overall performance. Thus, computations must run as close as possible to where the data resides. We propose a new approach that mitigates the NUMA effect on NUMA systems. Our solution is based on the OmpSs-2 programming model, a task-based parallel programming model, similar to OpenMP. We first provide a simple API to allocate memory in NUMA systems using different policies. Then, combining user-given information that specifies dependences between tasks, and information collected in a global directory when allocating data, we extend our runtime library to perform NUMA-aware work scheduling. Our heuristic considers data location, distance between NUMA nodes, and the load of each NUMA node to seamlessly minimize data motion costs and load imbalance. Our evaluation shows that our NUMA support can significantly mitigate the NUMA effect by reducing the amount of remote accesses, and so improving performance on most benchmarks, reaching up to 2x speedup in a 2-NUMA machine, and up to 7.1x in a 8-NUMA machine.

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Section: Nanos6 Numa-aware Scheduling Systemmentioning

confidence: 99%

Mitigating the NUMA effect on task-based runtime systems

et al. 2023

Self Cite

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“…Isso geralmente implica a existência de hierarquias de memória complexas e tecnologias que evoluem a cada ano. Assim, para continuar explorando o potencial dos sistemas computacionais de alto desempenho, as bibliotecas e interfaces de programac ¸ão paralela se equipam com diversas políticas de gerenciamento de recursos [Navarro et al 2020].…”

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Fundamentos de Computação Acelerada com CUDA C/C++

Lorenzon

2022

Minicursos Do XXIII Simpósio Em Sistemas Computacionais De Alto Desempenho

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This chapter highlights the fundamental tools and techniques for accelerating applications written in C/C++ languages to run on massively parallel architectures with CUDA. With CUDA, developers are able to dramatically accelerate the computation of applications on GPU (graphic processing unit) architectures. The Chapter has the following learning objectives: (I) writing parallel code to run on the GPU; (II) Expose and express data and instruction level parallelism in C/C++ applications using CUDA; (III) Use CUDAmanaged memory and optimize memory migration using asynchronous prefetching; and (IV) Use concurrent streams for instruction-level parallelism. ResumoEste capítulo destaca as ferramentas e técnicas fundamentais para acelerar aplicac ¸ões escritas em linguagens C/C++ para execuc ¸ão em arquiteturas massivamente paralelas com CUDA. Com CUDA, desenvolvedores são capazes de acelerar dramaticamente a computac ¸ão de aplicac ¸ões em arquiteturas GPU (graphic processing unit). O Capítulo tem os seguintes objetivos de aprendizagem: (I) escrever código paralelo para ser executado na GPU; (II) Expor e expressar paralelismo no nível de dados e instruc ¸ões em aplicac ¸ões C/C++ usando CUDA; (III) Utilizar o CUDA-managed memory e otimizar a migrac ¸ão de memória usando prefetching assíncrono; e (IV) Usar streams (fluxo de instruc ¸ões) concorrentes para paralelismo no nível de instruc ¸ões. Introduc ¸ãoSistemas computacionais de alto desempenho são amplamente utilizados para executar aplicac ¸ões de diversos domínios, que envolvem computac ¸ão financeira, aplicac ¸ões médicas, processamento de vídeo e imagem, entre outros. Esses sistemas geralmente são baseados em arquiteturas multi-core e many-core com memória e dispositivos de

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