Equalization techniques to ensure signal integrity in high speed serial and optical design

Kashif, Rao; Famoriji, Oluwole John; Lin, Fujiang

doi:10.1109/icuwb.2016.7790596

Cited by 2 publications

(3 citation statements)

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“…Equalization techniques can be either linear, FIR with delayed inputs, or non-linear, IIR with delayed outputs, and are often performed in combination on both the transmitter and receiver side of the link [9]. This thesis only examines a linear FIR feed-forward equalizer (FFE) that uses delayed and scaled versions of the input as seen in [7].…”

Section: Feed-forward Equalizermentioning

confidence: 99%

“…That error signal along with the channel output is used to calculate the channel tap coefficients. For both TX and RX equalization and both linear and nonlinear equalization, a channel's impulse response is calculated and compensates for the channel by using a series of coefficients to delayed versions of the signal [9]. This thesis only evaluates a receiver side feed-forward equalizer.…”

Section: Feed-forward Equalizermentioning

confidence: 99%

“…The BER also decreases from 10 -3 to 10 -5 BER when adding equalization with the physical CAT7 15ft channel. The BER also decreases with equalization for the simulated channel for all Eb/N0 values (see BER vs. Eb/N0 graph in Figure 4-23Figure [4][5][6][7][8][9][10][11][12][13][14][15][16][17][18][19][20][21][22].…”

Section: Ghzmentioning

confidence: 99%

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Verification of Receiver Equalization by Integrating Dataflow Simulation and Physical Channels

Ritter¹,

Smilkstein²

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This thesis combines Keysight's SystemVue software with a Vector Signal Analyzer (VSA) and Vector Signal Generator (VSG) to test receiver equalization schemes over physical channels. The testing setup, "Equalization Verification," is intended to be able to evaluate any equalization scheme over any physical channel, and a decision-directed feed-forward LMS equalizer is used as an example. The decision-directed feed-forward LMS equalizer is shown to decrease the BER from 10-2 to 10-3 (average of all trials) over a CAT7 and CAT6A cable, both simulated and physical, for 1GHz and 2GHz carrier, and 80MHz data rate. A wireless channel, 2.4GHz Dipole Antenna, is also tested to show that the addition of the equalization scheme decreases BER from 10-5 to less than 10-5. Then the simulation and equalization parameters (LMS step size, PRBS, etc.) are changed to further verify the equalization scheme. The simulated channel BER results do not always match the physical channel BER results, but the equalization scheme does decrease BER for both wired and wireless channels. Then transistor-based equalization model is created using both HDL SystemVue components and blocks easily implemented by transistors. The model is then verified using HDL, Spice, and SystemVue simulation. Overall this thesis accomplishes its goal of creating a testing setup, Equalization Verification, to show that adding a given simulated equalization scheme in SystemVue can improve the quality of the link, by decreasing BER by at least an order of magnitude, over a specific physical channel.

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Section: Feed-forward Equalizermentioning

confidence: 99%

Section: Feed-forward Equalizermentioning

confidence: 99%