Equivalent circuit models for stacked spiral inductors in deep submicron CMOS technology

Abstract

Series connected stacks of spirals in different metal levels facilitate on-chip high value inductance (hundreds of nano-henry without any extra penalty on area) for IF applications as well as compact inductance for RF applications [I-31. This paper presents SPICE compatible lumped element equivalent circuit models for these stacked metal layer inductors valid up to selfresonance frequency. The extracted models have been used in the design of heterodyne down converter mixer for WCDMA applications. Simulations show that use of high value on-chip inductance in the design yields a 2 dB improvement in the conversion gain and 2.5-3.5 dB improvement in noise figure without any additional power consumption as compared to the standard resistive load mixer while maintaining the IdB gain compression point.