Evaluating CLB designs under multiple SETs in SRAM-based FPGAs

Dhia, Arwa Ben; Naviner, Lírida Alves de Barros; Matherat, Philippe

doi:10.1109/dft.2013.6653592

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“…Consequently, it is fundamental to investigate and characterize the susceptibility of a device to these effects. Thus, in the last decades researchers put a lot of effort in estimating devices and applications sensibility with respect to SEUs and SETs [6]- [10].…”

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

A Novel Error Rate Estimation Approach forUltraScale+ SRAM-based FPGAs

Sterpone

Azimi

Bozzoli

et al. 2018

2018 NASA/ESA Conference on Adaptive Hardware and Systems (AHS)

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SRAM-based FPGA devices manufactured in FinFET technologies provide performances and characteristics suitable for avionics and aerospace applications. The estimation of error rate sensitivity to harsh environments is a major concern for enabling their usage on such application fields. In this paper, we propose a new estimation approach able to consider the radiation effects on the configuration memory and logic layer of FPGAs, providing a comprehensive Application Error Rate probability estimation. Experimental results provide a comparison between radiation test campaigns, which demonstrates the feasibility of the proposed solution.

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Section: Introductionmentioning

confidence: 99%

“…This increases the probability of SET pulses due to low energy particles which are wide enough to be propagate and sampled. Furthermore, the probability of a SET glitch to be sampled by flip-flops increases proportionally with the working frequency of the circuit [9], [10].…”

Section: Introductionmentioning

confidence: 99%