Evolution of multilevel voltage source inverters

Zinoviev, Gennady S.; Lopatkin, Nikolay N.

doi:10.1109/apeie.2008.4897071

Cited by 17 publications

(5 citation statements)

References 23 publications

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“…Several improvements had been done in order to produce high efficiency converter. For example, several researchers are focusing on reducing semiconductor devices by rearranging the circuit configuration [6,7]. Several topologies had been introduced in order to reduce the number of semiconductor devices [8,9] [10].…”

Section: Introductionmentioning

confidence: 99%

Multilevel inverter with MPWM-LFT switching strategy for voltage THD minimization

Yatim¹,

Ponniran²,

Kasiran³

2019

IJPEDS

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<span>This paper presents a proposed modified pulse width modulation – low frequency triangular (MPWM-LFT) switching strategy for minimization of voltage THD with implementation of asymmetric multilevel inverter (AMLI) topology on the reduced number of switching devices (RNSD) circuit structure. Principally, MPWM-LFT able to produce optimum angle of the output voltage level in order to minimize total harmonic distortion (THD). In this study, 5-level reduced number of switching devices circuit structure is selected as a circuit configuration for asymmetric (7-level structure) multilevel inverter. For switching strategy, MPWM used low switching frequency in producing signal and needs higher output voltage levels to achieve low total harmonic distortion. In contrast, sinusoidal pulse width modulation used high switching frequency in order to minimize total harmonic distortion. By optimizing angle at the output voltage using MPWM-LFT switching strategy, the voltage THD is lower as compared to MPWM and SPWM switching strategies. MPWM-LFT switching strategy obtains 11.6% of voltage THD for the 7-level asymmetric topology as compared to MPWM and SPWM switching strategies with the voltage THD are 21.5% and 17.5% respectively from the experimental works.</span>

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Section: Introductionmentioning

confidence: 99%

Multilevel inverter with MPWM-LFT switching strategy for voltage THD minimization

Yatim¹,

Ponniran²,

Kasiran³

2019

IJPEDS

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show abstract

“…Several improvements had been done in order to produce high efficiency converter. For example, several researchers are focusing on reducing semiconductor devices by rearranging the circuit configuration [6] [7]. Several topologies had been introduced in order to reduce the number of semiconductor devices such as symmetric multilevel inverter (SMLI) and asymmetric multilevel inverter (AMLI) which improve conventional multilevel inverter structures.…”

Section: Introductionmentioning

confidence: 99%

Analysis of Symmetric and Asymmetric Multilevel Inverter Topologies Using Reduced Number of Switching Devices Circuit Structure

Yatim¹,

Ponniran²,

Bakar³

et al. 2018

IJET

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This paper presents symmetric and asymmetric multilevel inverter principles using reduced number of switching devices circuit structure. Principally, asymmetric multilevel inverter topology able to produce higher output voltage level without modification of the structure in order to reduce total harmonic distortion at the output voltage. In contrast, the number of switching devices need to be increased with symmetric principle when higher output voltage level is considered. In this study, 5-level reduced number of switching devices circuit structure is selected as a circuit configuration for symmetric (5-level structure) and asymmetric (7-level and 9-level structures) multilevel inverters. For switching strategy, modified pulse width modulation and sinusoidal pulse width modulation are selected to produce output voltage levels of the inverter. Modified pulse width modulation used low switching frequency in producing signal and needs higher output voltage levels to achieve low total harmonic distortion. In contrast, sinusoidal pulse width modulation used high switching frequency in order to minimize total harmonic distortion. Theoretically, total harmonic distortion is reduced when number of output voltage level is increased for both cases. The findings show that, the 9-level asymmetric topology has lower total harmonic distortion compared to the 5-level symmetric topology and 7-level asymmetric topology, whereby these inverters using the same circuit configuration. The results show that, the total harmonic distortions of 9-level asymmetric topology, 7-level asymmetric topology and 5-level symmetric topology are 14.54%, 18.08% and 26.92%, respectively with sinusoidal pulse width modulation switching strategy. Meanwhile, with modified pulse width modulation switching strategy, the total harmonic distortions of 9-level asymmetric topology, 7-level asymmetric topology and 5-level symmetric topology are 18.7%, 21.68% and 28.99%, respectively. Therefore, 9-level asymmetric with sinusoidal pulse width modulation switching strategy show the lowest total harmonic distortion with optimum number of switching devices.

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“…Multilevel inverters have replaced the earlier used three-level inverters because of their high-quality output waveform, low voltage stress, and reduced switching losses [2,3]. The first prototype of multilevel inverter was made in USSR and was presented in [4]. Development of this prototype has given the idea for the latest schemes of the multilevel inverter.…”

Section: Introductionmentioning

confidence: 99%

Analytical Modelling and Verification of Bus-Clamping Modulation Technique for Switched-Capacitor Converter

Yalavarthi

Ahmad

2017

Modelling and Simulation in Engineering

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Space vector modulation techniques have advantages of high output voltages and reduced harmonic content as they utilize the dc bus effectively. Bus-clamped pulse width modulation classified in space vector techniques has the ability to reduce the switching losses of the converter and has reduced harmonic distortion. This paper provides mathematical analysis for 60-degree bus-clamping strategy to obtain the complete closed-form solution for finding the harmonic coefficients using double Fourier integral expression. The effectiveness of the bus-clamped approach on switched capacitor based multilevel inverter has been shown with comparison to Sinusoidal PWM. The DSP controller TMS320F240 has been chosen for the real-time implementation of 60-degree bus-clamping modulation technique. Simulation and experimental results of the prototype are presented for RL load at different modulation indices showing the superiority of the configuration to cascaded multilevel inverter.

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Evolution of multilevel voltage source inverters

Cited by 17 publications

References 23 publications

Multilevel inverter with MPWM-LFT switching strategy for voltage THD minimization

Multilevel inverter with MPWM-LFT switching strategy for voltage THD minimization

Analysis of Symmetric and Asymmetric Multilevel Inverter Topologies Using Reduced Number of Switching Devices Circuit Structure

Analytical Modelling and Verification of Bus-Clamping Modulation Technique for Switched-Capacitor Converter

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