Examining recent many-core architectures and programming models using SHOC

Lopez, M. Graham; Young, Jeffrey; Meredith, Jeremy; Roth, Philip C.; Horton, Mitchel; Vetter, Jeffrey S.

doi:10.1145/2832087.2832090

Cited by 10 publications

(5 citation statements)

References 20 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…We chose six benchmarks from the Rodinia suite and one benchmark from the SHOC suite for our application suite. The additional SHOC benchmark represents the sparse linear algebra application class, which is not present in Rodinia.…”

Section: Evaluating Coprocesssor Performancementioning

confidence: 99%

Comparative analysis of coprocessors

Sakdhnagool

Sabne

Eigenmann

2018

Concurrency and Computation

View full text Add to dashboard Cite

While GPUs have seen a steady increase in usage, Xeon Phis have struggled in proving their value, and eventually got discontinued. Is this a matter of the Intel many-core architecture's younger age or are there reasons due to specific features? This paper reviews quantitative information addressing these questions. Using two latest coprocessors, we evaluate performance and programming productivity across a range of microbenchmarks and applications. We consider productivity as the percentage of hand-optimized performance reached by a simple high-level parallel programming model that is translated onto the specific architectures by advanced compilers. We evaluate and compare the performance of the two coprocessors and point out where Xeon Phis fall short. We also briefly review the performance of different execution modes of Xeon Phis.Moreover, unlike common expectation, we found that Xeon Phis' productivity is marginally better that GPUs. The current results suggest that the performance advantage of GPUs outweighs the productivity benefit of Xeon Phis. Closing the performance gap and increasing the productivity benefit that a more regular many-core paradigm can offer will be essential in designing a next-generation architecture.

show abstract

Section: Evaluating Coprocesssor Performancementioning

confidence: 99%

Comparative analysis of coprocessors

Sakdhnagool

Sabne

Eigenmann

2018

Concurrency and Computation

View full text Add to dashboard Cite

show abstract

“…This trend indicates that determining the optimal mapping to the Xeon Phi is critical to application developers. In a total of 19 works (Aprà et al, 2014; Bernaschi and Salvadore, 2014; Bernaschi et al, 2014; Brown et al, 2015; Heinecke et al, 2013; Höhnerbach et al, 2016; Jundt et al, 2015; Krishnaiyer et al, 2013; Lai et al, 2014; Liu et al, 2015; Lopez et al, 2015; Mathew et al, 2015; Misra et al, 2013; Newburn et al, 2013; Park et al, 2013; Saini et al, 2015; Sainz et al, 2015; Saule et al, 2014; Teodoro et al, 2014), it was found the Xeon Phi outperformed the CPU, and only two works found the CPU to be better (Li et al, 2014; Luo et al, 2013). Hence, Xeon Phi was found to be a promising accelerator.…”

Section: Introductionmentioning

confidence: 99%

Applying EMD/HHT analysis to power traces of applications executed on systems with Intel Xeon Phi

Lawson

Sosonkina

Ezer

et al. 2017

The International Journal of High Performance Computing Applica

View full text Add to dashboard Cite

Power draw is a complex physical response to the workload of a given application on the hardware, which is difficult to model, in part, due to its variability. The empirical mode decomposition and Hilbert–Huang transform (EMD/HHT) is a method commonly applied to physical systems varying with time to analyze their complex behavior. In authors’ work, the EMD/HHT is considered for the first time to study power usage of high-performance applications. Here, this method is applied to the power measurement sequences (called here power traces) collected on three different computing platforms featuring two generations of Intel Xeon Phi, which are an attractive solution under the power budget constraints. The high-performance applications explored in this work are codesign molecular synamics and general atomic and molecular electronic structure system—which exhibit different power draw characteristics—to showcase strengths and limitations of the EMD/HHT analysis. Specifically, EMD/HHT measures intensity of an execution, which shows the concentration of power draw with respect to execution time and provides insights into performance bottlenecks. This article compares intensity among executions, noting on a relationship between intensity and execution characteristics, such as computation amount and data movement. In general, this article concludes that the EMD/HHT method is a viable tool to compare application power usage and performance over the entire execution and that it has much potential in selecting most appropriate execution configurations.

show abstract

“…In this way, heterogeneous computing systems have emerged as an important contribution to provide computational capacity in high‐performance computing. In fact, the prevalence of heterogeneous systems in the TOP500 list grew from 3.4% to 18.0% between June 2010 and June 2015 . Hence, one of the important and challenging issues in parallel and distributed computing systems is heterogeneity…”

Section: Introductionmentioning

confidence: 99%

“…In fact, the prevalence of heterogeneous systems in the TOP500 list grew from 3.4% to 18.0% between June 2010 and June 2015. 13 Hence, one of the important and challenging issues in parallel and distributed computing systems is heterogeneity. 14 In this paper, we target clusters of heterogeneous nodes each having different computational powers but do not address GPU accelerators.…”

Section: Introductionmentioning

confidence: 99%

3‐D data partitioning for 3‐level perfectly nested loops on heterogeneous distributed systems

Zefreh

Lotfi

Khanli

et al. 2016

Concurrency and Computation

View full text Add to dashboard Cite

SummaryNested loops are the largest source of parallelism in many data-parallel scientific applications.Heterogeneous distributed systems are popular computing platforms for data-parallel applications. Data partitioning is critical in exploiting the computational power of such systems, and existing data partitioning algorithms try to maximize performance of data-parallel applications by finding a data distribution that balances the workload between the processing nodes while minimizing communication costs. This paper addresses the problem of 3-dimensional data partitioning for 3-level perfectly nested loops on heterogeneous distributed systems. The primary aim is to minimize the execution time by improving the load balancing and minimizing the internode communications. We propose a new data partitioning algorithm using dynamic programming, build a theoretical model to estimate the execution time of each partition, and select a partition with minimum execution time as a near-optimal solution. We demonstrate the effectiveness of the new algorithm for 2 data-parallel scientific applications on heterogeneous distributed systems. The new algorithm reduces the execution time by between 7% and 17%, on average, compared with leading data partitioning methods on 3 heterogeneous distributed systems. architecture and the need to meet ever-increasing computing needs of scientific applications, the computational capacity of the clusters is often increased. 8,9 As a first approach, we could replace all processing nodes with newer, faster ones. In this case, the cluster remains homogeneous over time, but a complete replacement of all nodes can be very costly. As a second approach, we could upgrade the cluster by adding more processing nodes that use a newer technology with higher speed. Also, we could aggregate several clusters together to use their computational power for solving computing problems. 8 Another approach is adding graphics processing units (GPUs) to improve performance of existing nodes. 9 In the latter 3 cases, the cluster becomes heterogeneous. [10][11][12] In this way, heterogeneous computing systems have emerged as an important contribution to provide computational capacity in high-performance computing. In fact, the prevalence of heterogeneous systems in the TOP500 list grew from 3.4% to 18.0%

show abstract

Examining recent many-core architectures and programming models using SHOC

Cited by 10 publications

References 20 publications

Comparative analysis of coprocessors

Comparative analysis of coprocessors

Applying EMD/HHT analysis to power traces of applications executed on systems with Intel Xeon Phi

3‐D data partitioning for 3‐level perfectly nested loops on heterogeneous distributed systems

Contact Info

Product

Resources

About