Exploring Four Direct Synthesis Scenarios for Fractional-Order Controllers

Abstract

The noticeable lag in the development of fractional-order controllers through direct synthesis, compared to their PID counterparts, underscores a clear challenge. To counteract this trend and explore novel control structures, a dual approach involving hardware synthesis and parameter optimization is imperative. This study primarily focuses on hardware synthesis, investigating four scenarios that combine various integer and fractional-order models for both the plant and the desired closed-loop transfer function. Anchored in Oustaloup’s fractional-order derivative approximation, the approach utilizes biquadratic filters and adder amplifiers for synthesis. The method’s validity is demonstrated through numerical simulations of two examples and experimental characterization of one of them. The latter involves the use of two AN231E04 Field Programmable Analog Arrays. The ensuing response effectively showcases the dynamic behavior of a three-term fractional system with an order of 2α=49.2, a natural frequency ω n =49 rad/s, and a damping factor of ζ=− 0.1. The results underscore the practical viability of the proposed approach, laying a foundation for its application in real-world scenarios.