Fast Settling Phase-Locked Loops: A Comprehensive Survey of Applications and Techniques [Feature]

Abstract

Fast settling phase locked loops (PLLs) play a pivotal role in many applications requiring rapid attainment of a stable frequency and phase. In modern communication standards, these PLLs are extensively utilized to guarantee precise compliance with dynamic resource allocation requirements. In processors, these PLLs manage dynamic voltage frequency scaling. Moreover, the fast-settling PLLs expedite the scanning of frequency spectra in sophisticated electronic radar set-ups, proving particularly advantageous for imaging and scanning radar applications. The rapid response exhibited by these PLLs is also harnessed in quantum technologies, catering to the urgent need for precise frequency adjustments to manipulate qubit states effectively. The strategies employed to attain fast-settling PLLs are primarily classified into five broad techniques in this article: enhanced phase-frequency detection, hybrid multiple subsystems, VCO start-up, gear shift, and look-up table or finite state machine. This article explores the fundamental operational principles encompassing these techniques and presents optimal settling times for each method reported in the literature. Finally, the architectures utilizing these techniques will be evaluated based on their figure of merit (F oM ), settling time, and tuning range.