Fault-tolerant universal reversible gate design in QCA nanotechnology

Riyaz, Sadat; Sharma, Vijay Kumar; Kaushik, Neeraj

doi:10.1016/j.prime.2024.100435

Cited by 1 publication

(2 citation statements)

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“…In Riyaz et al (2024), a universal and reversible gate is presented. This gate is designed and simulated using 39 cells and works in one clock phase.…”

Section: Figurementioning

confidence: 99%

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Design and simulation of a new QCA-based low-power universal gate

Sadrarhami,

Zanjani,

Dolatshahi

et al. 2024

Front. Comput. Sci.

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Quantum-dot Cellular Automata (QCA) is recognized in electronics for its low power consumption and high-density capabilities, emerging as a potential substitute for CMOS technology. GDI (Gate Diffusion Input) technology is featured as an innovative approach for enhancing power efficiency and spatial optimization in digital circuits. This study introduces an advanced four-input Improved Gate Diffusion Input (IGDI) design specifically for QCA technology as a universal gate. A key feature of the proposed 10-cell block is the absence of cross-wiring, which significantly enhances the circuit’s operational efficiency. Its universal cell nature allows for the carrying out of various logical gates by merely altering input values, without necessitating any structural redesign. The proposed design showcases notable advancements over prior models, including a reduced cell count by 17%, a 29% decrease in total energy usage, and a 44% reduction in average energy loss. This innovative IGDI design efficiently executes 21 combinational and various sequential functions. Simulations in 18 nm technology, accompanied by energy consumption analyses, demonstrate this design’s superior performance compared to existing models in key areas such as multiplexers, comparators, and memory circuits, alongside a significant reduction in cell count.

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“…In Riyaz et al (2024), a universal and reversible gate is presented. This gate is designed and simulated using 39 cells and works in one clock phase.…”

Section: Figurementioning

confidence: 99%

“…Additionally, establishing communication between different gates increases circuit latency. Introducing universal gates, particularly for complex circuitry, can reduce circuit size, latency, and power consumption (Riyaz et al, 2024).…”

Section: Introductionmentioning

confidence: 99%