Filling of Very Fine Via Holes for Three-Dimensional Packaging by Using Ionized Metal Plasma Sputtering and Electroplating

We combined a "via-last through-silicon via (TSV) process consisting of notchless Si etching and wet cleaning of the first metal layer" with the solder bonding process using Ar fast atom beam (FAB), and realized the fabrication and three-dimensional (3D) stacking of a high-density TSV array chip. The size of the TSV array was 76 × 500. The diameter and length of the TSV were 6 and 21-22 μm, respectively. As the TSV array chip was very thin (approximately 26 μm) and had a strip-like shape, it was fragile and warped by approximately 90 μm. Hence, an electrostatic chuck was introduced and the TSV array chip was stacked by using a soft material (Cu-Ni-Sn based solder) as a bump and performing low-pressing-load low-temperature bonding with Ar FAB. As a result, the warpage of TSV array chip was suppressed and the TSV array chip was stacked without causing damage to the TSV and Si region. In addition, it was confirmed that the (i) leakage current between TSV-bump pairs is small, (ii) multilayer wiring + TSV + bump connection exhibit low resistance, and (iii) daisy chain is perfectly connected to up to 38 000 TSVs. These results are due to the effects of notchless Si etching, wet cleaning of the first metal layer, introduction of an electrostatic chuck, low-pressing-load low-temperature bonding with a soft material, and Ar FAB. This process will facilitate the development of face-up type 3D stacked sensor systems.

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“…After the Ar-ion cleaning [Fig. 3(k)], a titanium-copper (Ti-Cu) film was deposited by ionized sputtering 26,27) [Fig. 3(l)].…”

Section: Fabrication Of Tsv Array Chipmentioning

confidence: 99%

Fabrication and stacking of through-silicon-via array chip formed by notchless Si etching and wet cleaning of first metal layer

Watanabe

Kikuchi²,

Yanagisawa³

et al. 2019

Jpn. J. Appl. Phys.

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“…최근 through-Si via (TSV)를 이용한 3-D packaging 연구가 활발히 진행 되고 있다. 6,7) TSV filling물질로는 Cu가 주로 사용되고 있 는데 이 경우에도 Cu확산을 방지시킬 수 있는 확산방지 막이 필요하다.…”

Section: 서 론unclassified

Crystalline Structure and Cu Diffusion Barrier Property of Ta-Si-N Films

정¹,

이²

2011

Korean. J. Mater. Res.

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The microstructure and Cu diffusion barrier property of Ta-Si-N films for various Si and N compositions were studied. Ta-Si-N films of a wide range of compositions (Si: 0~30 at.%, N: 0~55 at.%) were deposited by DC magnetron reactive sputtering of Ta and Si targets. Deposition rates of Ta and Si films as a function of DC target current density for various N 2 / (Ar + N 2 ) flow rate ratios were investigated. The composition of Ta-Si-N films was examined by wavelength dispersive spectroscopy (WDS). The variation of the microstructure of Ta-Si-N films with Si and N composition was examined by X-ray diffraction (XRD). The degree of crystallinity of Ta-Si-N films decreased with increasing Si and N composition. The Cu diffusion barrier property of Ta-Si-N films with more than sixty compositions was investigated. The Cu(100 nm)/Ta-Si-N(30 nm)/Si structure was used to investigate the Cu diffusion barrier property of Ta-Si-N films. The microstructure of all Cu/Ta-Si-N/Si structures after heat treatment for 1 hour at various temperatures was examined by XRD. A contour map that shows the diffusion barrier failure temperature for Cu as a function of Si and N composition was completed. At Si compositions ranging from 0 to 15 at.%, the Cu diffusion barrier property was best when the composition ratio of Ta + Si and N was almost identical.

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“…Electroplating of Cu has been widely used for the filling of TSV/T. [5][6][7] However, optimization of the numerous process variables in the electroplating process becomes very complicated as the aspect ratio increases. The process time required for filling by electroplating is an important factor for economic efficiency and currently more than 30 min is needed for the filling of vias with an aspect ratio of 7 by electroplating.…”

Section: Introductionmentioning

confidence: 99%

The Effect of Plasma Treatment on Adsorbed Iodine as a Catalyst in Chemical Vapor Deposition of Copper and Application to Filling of Deep Trenches with High Aspect Ratios

Lee¹,

Lee²

2009

jjap

Self Cite

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Plasma treatment was introduced in order to control the catalytic properties of iodine in catalyst-enhanced chemical vapor deposition (CECVD) of copper (Cu). The iodine adatoms are deactivated (i.e., lose their catalytic effect) by forming Cu-I bonds through reaction with Cu atoms by the bombardment of ions during the plasma treatment. The surface concentration of effective iodine adatoms that can act as catalysts decreases exponentially with an increasing of ion exposure which is the product of ion flux and plasma treatment time. The deactivated iodine can be reactivated by annealing above 200 C. The enhancement factor, defined as the ratio of the enhanced deposition rate of Cu film by the adsorbed iodine to the deposition rate without the catalytic effect of iodine, is proportional to the surface concentration of effective iodine adatoms. The distribution of the surface concentration of effective iodine adatoms inside the trench can be controlled by the plasma treatment. CECVD coupled with plasma treatment enables void-free filling of deep trenches with an aspect ratio of 14.

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Filling of Very Fine Via Holes for Three-Dimensional Packaging by Using Ionized Metal Plasma Sputtering and Electroplating

Cited by 16 publications

References 8 publications

Fabrication and stacking of through-silicon-via array chip formed by notchless Si etching and wet cleaning of first metal layer

Fabrication and stacking of through-silicon-via array chip formed by notchless Si etching and wet cleaning of first metal layer

Crystalline Structure and Cu Diffusion Barrier Property of Ta-Si-N Films

The Effect of Plasma Treatment on Adsorbed Iodine as a Catalyst in Chemical Vapor Deposition of Copper and Application to Filling of Deep Trenches with High Aspect Ratios

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