Flowpaths: Compiling stack-based IR to hardware

Java bytecode to hardware made easy with bluespec system verilog

“…This observation is not new (see e.g. [3], [16]), and the result is similar to bytecode folding (e.g. [14]), except that it happens at compile/synthesis time, in hardware.…”

“…The Flowpath approach is introduced in [16] as a way of compiling stack-based intermediate representations (Java bytecode, Forth) to standalone hardware targeting FPGAs. They argue that stack operations will often translate to zeroclock-cycle routing in hardware, eliminating the overhead of memory access.…”

“…For instance, approaches that implement whole applications in hardware (where Java is used as a hardware specification language), must implement or explicitly forbid all of these features. In [16,29], objects must be static (no runtime memory management) and recursion is not allowed. Synchronization is not particularly hard to implement using signals between hardware modules and priorities [15].…”

“…One notable difference between their approach and ours rests with the memory model. They use the model described in [16], where each access requires 2 clock cycles. In our case, we adopt the OPB as bus interface and the object layout of JOP/BlueJEP for use with a garbage collector [10].…”

“…hand there are approaches that focus on translating specific Java code into hardware, either from Java sources [1,29] or from bytecode to hardware [3,16,32]. In this paper we focus on the latter, namely bytecode to hardware translation.…”