Full Custom Design of an Arbitrary Waveform Gate Driver With 10-GHz Waypoint Rates for GaN FETs

Liu, Dawei; Dymond, Harry C. P.; Hollis, Simon; Wang, Jianjing; McNeill, Neville; Pamunuwa, Dinesh; Stark, Bernard H.

doi:10.1109/tpel.2020.3044874

Cited by 23 publications

(7 citation statements)

References 20 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Effective closed-loop AGD designs will likely require ASIC implementations of the controlling logic level-shifting and the AGD itself, rather than implementations formed of discrete components like the MMGD utilised in this study. Promising high-speed sub-nanosecond propagation delay level-shifters with high common-mode transient immunity have been presented [35], alongside high-frequency ASIC implementations of AGD's for Gallium Nitride devices [36]. Further potential barriers to the implementation of closeloop AGDs are illustrated in Fig.…”

Section: Discussion On Active Gate Drive Designmentioning

confidence: 99%

Investigation Into Active Gate-Driving Timing Resolution and Complexity Requirements for a 1200 V 400 A Silicon Carbide Half Bridge Module

Parker

Şahin

Mathieson

et al. 2023

IEEE Open J. Power Electron.

View full text Add to dashboard Cite

Silicon Carbide MOSFETs have lower switching losses when compared to similarly rated Silicon IGBT, but exhibit faster switching edges, larger overshoots and increased oscillatory switching behaviour, resulting in greater electro-magnetic interference (EMI) generation. Active Gate Drivers (AGD) can help mitigate these issues while maintaining low switching losses. Numerous AGD topologies have been presented with varying capabilities in terms of timing resolution and output stage complexity. This paper presents an experimental investigation into the influence these capabilities have on the switching performance of an AGD driven high current module, with the goal of advising future AGD designers on the performance trade-offs between signal resolution and complexity. A 2.5 ns resolution 6-level AGD was utilised in combination with parameter sweeps and a genetic algorithm to determine gate voltage patterns that provided improved switching performance. Results indicate that higher resolution (2.5-5 ns) provided the greatest improvements in switching performance, even utilising the simplest considered gate driving patterns, with the use of more complex patterns offering minimal additional improvements. However, at lower timing resolutions (10-40 ns) a stronger set-point dependence degradation in switching performance is observed when using simpler gate patterns, which can be mitigated by utilising more complex patterns.

show abstract

Section: Discussion On Active Gate Drive Designmentioning

confidence: 99%

Investigation Into Active Gate-Driving Timing Resolution and Complexity Requirements for a 1200 V 400 A Silicon Carbide Half Bridge Module

Parker

Şahin

Mathieson

et al. 2023

IEEE Open J. Power Electron.

View full text Add to dashboard Cite

show abstract

“…Recent development in the technology of wide-bandgap semiconductor power devices, including SiC MOSFETs and GaN FETs, put a high demand on gate drive circuits to make the most of their fast-switching capability [1,2]. Active gate drive (AGD) is one of the promising techniques to enhance the application of such power devices [3][4][5][6]. The fundamental idea of AGD is to control the slew rate of the power device actively during the switching transient to suppress unwanted overshoots in device voltage/current and resulting EMI, while achieving a fast switching.…”

Section: Introductionmentioning

confidence: 99%

“…The fundamental idea of AGD is to control the slew rate of the power device actively during the switching transient to suppress unwanted overshoots in device voltage/current and resulting EMI, while achieving a fast switching. This can be done either by actively changing the gate resistance [4,5,7,8], applying a variable gate-source voltage (V GS ) [6,[9][10][11][12][13][14], or limiting/boosting the gate current [15][16][17]. Initially proposed to drive Si IGBTs [11,15], AGD has been intensely studied for SiC MOSFETs in recent years, with typically nano-second order control due to the increased switching speed.…”

Section: Introductionmentioning

confidence: 99%

“…Digitized AGDs have been investigated primarily to benefit from digital control using FPGAs or programmable chips [5,9,17]. There is another aspect of this technology; they cut into the interface between the digital signal regions and the analog phenomenon of power switching.…”

Section: Introductionmentioning

confidence: 99%

“…In other words, it can force the MOSFET to be in certain gate bias state during the transient, which is not possible in variable-resistor type AGDs. These aspects differentiate this work from other types of pattern-search-based digital AGDs [5,9,16,17].…”

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

Digital-Twin-Compatible Optimization of Switching Characteristics for SiC MOSFETs Using Genetic Algorithm

Takayama

Fukunaga

Hikihara

2023

IEEE J. Emerg. Sel. Top. Ind. Electron.

View full text Add to dashboard Cite

Active gate drive (AGD) is one of the key techniques to utilize SiC power devices' fast-switching capability without compromising the drawbacks. However, the increasing complexity in the circuit design makes it hard to have an optimized operation without expert know-hows or considerable design efforts. This paper demonstrates a digital-twincompatible metaheuristic optimization system for a digital AGD. It offers a totally-digital control of switching characteristics of power devices through genetic-algorithm-based optimization. An individually developed digital AGD is adopted to generate a genetically expressed gate-voltage waveform by a multi-bit gate signal sequence. The optimization system is verified in simulation and experiment by successfully obtaining the optimum Pareto-front solutions, which clarify the relationship between the selected gate voltage levels and the device characteristics. The optimization is also performed for variable operating conditions and for different SiC MOSFETs. The results of this paper offer feasibility for a software-based optimization of gate drive design.

show abstract

Switching waveform design with gate charge control for power MOSFETs

Oomori

Omura

2022

Power Electronic Devices and Components

View full text Add to dashboard Cite

Full Custom Design of an Arbitrary Waveform Gate Driver With 10-GHz Waypoint Rates for GaN FETs

Cited by 23 publications

References 20 publications

Investigation Into Active Gate-Driving Timing Resolution and Complexity Requirements for a 1200 V 400 A Silicon Carbide Half Bridge Module

Investigation Into Active Gate-Driving Timing Resolution and Complexity Requirements for a 1200 V 400 A Silicon Carbide Half Bridge Module

Digital-Twin-Compatible Optimization of Switching Characteristics for SiC MOSFETs Using Genetic Algorithm

Switching waveform design with gate charge control for power MOSFETs

Contact Info

Product

Resources

About