Fully-differential, DC-coupled, self-biased, monolithically-integrated optical receiver in 0.25μm photonic BiCMOS Technology for multi-channel fiber links

Gudyriev, Sergiy; Scheytt, J. Christoph; Yan, Lei; Meuer, Christian; Zimmermann, Lars

doi:10.1109/bctm.2017.8112922

Cited by 7 publications

(2 citation statements)

References 8 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Mismatch resulting from fabrication tolerances can be overcome by this external controllability. While a high linearity does not play a role in this TIA aimed at triggersignal generation, fully differential architectures present advantages in terms of signal-to-noise ratio (SNR) and supply noise rejection [23], [24] and will be considered in future chip iterations.…”

Section: Time-interleaved Adcsmentioning

confidence: 99%

Optically Enabled ADCs and Application to Optical Communications

Zazzi

Müller

Weizel

et al. 2021

IEEE Open J. Solid-State Circuits Soc.

View full text Add to dashboard Cite

Electrical-optical signal processing has been shown to be a promising path to overcome the limitations of state-of-theart all-electrical data converters. In addition to ultra-broadband signal processing, it allows leveraging ultra-low jitter mode-locked lasers and thus increasing the aperture jitter limited effective number of bits at high analog signal frequencies. In this paper, we review our recent progress towards optically enabled time-and frequency-interleaved analog-to-digital converters, as well as their monolithic integration in electronic-photonic integrated circuits. For signal frequencies up to 65 GHz, an optoelectronic track-andhold amplifier based on the source-emitter-follower architecture is shown as a power efficient approach in optically enabled BiCMOS technology. At higher signal frequencies, integrated photonic filters enable signal slicing in the frequency domain and further scaling of the conversion bandwidth, with the reconstruction of a 140 GHz optical signal being shown. We further show how such optically enabled data converter architectures can be applied to a nonlinear Fourier transform based integrated transceiver in particular and discuss their applicability to broadband optical links in general.

show abstract

Section: Time-interleaved Adcsmentioning

confidence: 99%

Optically Enabled ADCs and Application to Optical Communications

Zazzi

Müller

Weizel

et al. 2021

IEEE Open J. Solid-State Circuits Soc.

View full text Add to dashboard Cite

show abstract

“…In order to realize low cost, one method is that the dummy PD is replaced with the internal capacitance in the chip, [3][4][5] and it needs differential TIA to generate differential output to the latter LA. Another method is that the dummy PD is removed, 6,7 so it also needs dummy TIA or differential TIA to generate DC point. Both of the above methods will increase power consumption.…”

Section: Introductionmentioning

confidence: 99%

A 25 Gbps single‐end input limiting amplifier with loss of signal for low power integrated optical receivers

Wang

Chen

JinLong

2021

Micro & Optical Tech Letters

View full text Add to dashboard Cite

A 25 Gbps limiting amplifier (LA) with loss of signal (LOS) detection is presented in this paper. The proposed LA is composed of an input buffer, three‐stage cascaded amplifier, an output buffer, a DC offset cancellation (DCOC) and a LOS circuit. The LA adopts single‐end input and differential output structure to reduce the complexity of optical receiver front‐end and therefore decrease power consumption drastically. DCOC circuit consists of a low‐pass filter and an operation amplifier to extract the DC point of transimpedance amplifier output signal. Replica peak detector is employed in LOS to overcome the fluctuations of process, voltage, temperature (PVT). Fabricated in 0.13 μm SiGe BiCMOS technology, the LA acquires gain of 43.5, –3 dB bandwidth of 20.6 GHz and differential output voltage swing of 350 mV. With the 20 mV PRBS31 input data, the peak‐to‐peak jitter of output signal is 13.9 ps. When the input swing is larger than 40 mV, the peak‐to‐peak jitter is decreased to 7.5 ps. The whole LA with LOS chip only consumes 25.2 mW with a 1.8 V supply voltage.

show abstract