Fully integrated frequency synthesizer design for wireless network application with digital programmability

Fu, Jianqin; Teo, T. Hui; Tan, Eng Leong

doi:10.1002/mop.22773

Cited by 4 publications

(3 citation statements)

References 9 publications

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“…The proposed self-biased circuit is shown in Figure 3. N[0], N [1], N [2], N [3], N [4], N [5], N [6], and N [7] are the corresponding bits of the 8-bit programmable frequency divider. The current I 1 is related to I 0 by…”

Section: The Self-biased Circuitmentioning

confidence: 99%

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A Novel Self-Biased Phase-Locked Loop Scheme for WLAN Applications

Tian

et al. 2021

Electronics

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This article presents a novel self-biased phase-locked loop (PLL) scheme for wireless local area network (WLAN) applications. A novel self-biased circuit that contains a current mirror circuit and a variable resistor circuit related to the frequency division ratio are proposed. The proposed self-biased PLL scheme achieves a fixed damping factor. Moreover, the self-biased technology allows the PLL loop bandwidth to track the input reference frequency and division ratio. The proposed start-up circuit speeds up the locking of the PLL. In addition, the proposed differential-to-single-ended (DTS) converter can guarantee a 50% duty cycle without operating the PLL at twice the chip operating frequency. The proposed self-biased PLL is implemented in a Semiconductor Manufacturing International Corporation (SMIC) 55 nm CMOS process. The measured root-mean-square jitter (RMS-jitter) integrated of PLL is 2.4 ps with a dissipation of 8.6 mW, and the resulting figure-of-merit is −223.05 dBc/Hz.

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Section: The Self-biased Circuitmentioning

confidence: 99%

“…In recent years, the rapid development of WLANs has played an increasingly important role in communication systems. The PLL is one of the most critical building blocks in wireless transceivers [1][2][3][4]. The constantly updated WLAN technology introduces higher requirements on frequency synthesizers.…”

Section: Introductionmentioning

confidence: 99%

A Novel Self-Biased Phase-Locked Loop Scheme for WLAN Applications

Tian

et al. 2021

Electronics

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show abstract

“…This further verifies the extraction technique that has been developed here. The HBT substrate network extracted in this work was also used in the design of the 10 GHz Si/SiGe oscillators [105,134], which will be described in detail in Chapter 6. This chapter serves to extend the validation of the modeling and characterization work that has been proposed and implemented in the previous chapters.…”

Section: Resultsmentioning

confidence: 99%