Fully redundant clock generation and distribution with dynamic oscillator switchover

Abstract

This paper describes a fully redundant clock generation and distribution approach with a fully dynamic switchover capability and concurrent repair. It highlights the challenges as the design evolved from a single source, to a ''cold '' standby backup, and finally to a fully redundant transparent switchover with no interruption of the workloads running on an IBM System z9e. The function split between hardware and the various levels of firmware is described, including the methods to determine the defect component in the clock distribution paths. Finally, we describe the joint effort with a major chip technology vendor to design and develop the necessary circuitry, according to the z9e requirements, for clock synchronization and switching.