Functional verification of analog blocks in FIDELDO: a unified mixed-mode simulation environment

Abstract

Miniparc, les Achantes, Chemin du vieux chOne 38240 Meylan **Centre National dEtudes de T616communications Chemin du vieux chene 38240 Mevlan k l B m 3 K l The rapidly increasing complexity of today's circuits mandates that the design process to be supported in the early design phase at higher levels of abstraction. Towards that end, the designer must have the possibility to describe and simulate arbitrary analog blocks a t higher level. FIDELDO is a true mixed-mode simulator based on the unified approach. The circuit can be described and simulated at functional, logical and/or transistor levels. In this paper we present the methodology to model and simulate analog blocks in FIDELDO at t h e functional level (black box) while maintaining their analog characteristics. A linear analog block is modeled via its transfer function H(s) and H(z) which is converted internally into time domain state space representation.