Gate quality ultrathin (2.5 nm) PECVD deposited oxynitride and nitrided oxide dielectrics

Ibok, E.; Ahmed, K.; Hao, Ming-Yin; Ogle, B.; Wortman, J. J.; Hauser, John R.

doi:10.1109/55.784446

Cited by 17 publications

(14 citation statements)

References 9 publications

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“…The improvement of the electrical reliability of the ONO film is believed to be related to the PECVD N 2 O-plasma effectively repairing defects in the oxynitride film, such as Si dangling bonds. 9 Moreover, the accumulation of nitrogen at the oxynitride/poly-Si interface may be one reason for the high electrical reliability. 10 Figure 3 shows the charge-trapping characteristics of TEOS, Si 3 N 4 , and ONO films under a constant current stress.…”

Section: Methodsmentioning

confidence: 99%

“…8 Furthermore, N 2 O-plasma oxide has been reported to have strong SiwN bonds, excellent charge trapping properties, and a smooth surface at the oxynitride/poly-Si interface. 9 Hence, the proposed PECVD ONO gate dielectric for LTPS TFTs was expected to be able to provide high quality interface properties, increased electric breakdown voltage, and enhanced reliability.…”

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confidence: 99%

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Low-Temperature Poly-Si Thin-Film Transistor with a N[sub 2]O-Plasma ONO Multilayer Gate Dielectric

Chang

Yang

Hung

2004

Electrochem. Solid-State Lett.

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High-performance polycrystalline silicon ͑poly-Si͒ thin-film transistors ͑TFTs͒ with oxide/nitride/oxynitride ͑ONO͒ multilayer gate dielectrics were fabricated. The low-temperature ͑Ϲ300°C͒ ONO multilayer dielectric uses three stacked layers: the bottom layer is a very thin N 2 O-plasma oxynitride deposited by plasma-enhanced chemical vapor deposition ͑PECVD͒, the middle layer is PECVD Si 3 N 4 , and the top layer is tetraethoxysilane ͑TEOS͒ oxide. The ONO gate dielectric on poly-Si films shows a very high breakdown field of 9.4 MV/cm, a longer time-dependent dielectric breakdown lifetime and a lower charge trapping rate than single-layer PECVD TEOS oxide or nitride. The fabricated poly-Si TFTs with ONO gate dielectric exhibited excellent transfer characteristics, high field-effect mobility of 213 cm 2 /V s, and an ON/OFF current ratio of over 10 8 .In the realization of large-area active matrix liquid crystal displays ͑AMLCDs͒ with embedded peripheral poly-Si thin-film transistor ͑TFT͒ drive circuits on the panel, field-effect mobility and gate insulator quality are two of the most important determinants of the performance and reliability of low-temperature polycrystalline silicon ͑LTPS͒ TFTs. 1 It has been reported that high field-effect mobility LTPS TFTs were obtained by excimer laser annealing ͑ELA͒. 2 However, traditional LTPS TFTs use single-layer plasmaenhanced chemical vapor deposition ͑PECVD͒ SiO 2 or Si 3 N 4 as the gate insulator and so suffer from high interface trap density, low breakdown strength, and high gate leakage current. 3,4 In 1984, Watanabe et al. first reported silicon oxide-nitride-oxide ͑ONO͒ films as alternative dielectrics for dynamic random access memory ͑DRAM͒ cell capacitors. 5 In 1995, Yang et al. used ONO film as a gate insulator in high temperature TFTs. 6 In ONO multilayer structures, the bottom oxide provides a device-quality electrical SiO 2 /Si interface. The nitride layer increases the effective dielectric constant of the ONO sandwich in such a way that a film twice as thick as SiO 2 -based dielectric shows equal capacitance, and therefore decreased threshold voltage, decreased subthreshold swing, and increased drive current of the poly-Si TFTs. Finally, the top oxide provides the electrical contact to the poly-Si gate electrode. 7 Although ONO structures exploit the advantages of oxide and nitride films concomitantly, ONO films are prepared by thermal growth in a low-pressure ͑LP͒CVD reactor at high temperature ͑Ͼ750°C͒; this method is not appropriate for fabricating LTPS TFTs at a temperature much higher than a strain point of the glass substrate.This paper presents a low temperature ͑Ϲ300°C͒ PECVD oxide/ nitride/N 2 O-plasma oxynitride ͑ONO͒ multilayer gate dielectric. PECVD SiO 2 /Si 3 N 4 stack dielectric has lower leakage current and much longer ͑by two to three orders of magnitude͒ time-dependent dielectric breakdown ͑TDDB͒ lifetime than single-layer PECVD tetraethoxysilane ͑TEOS͒ oxide or Si 3 N 4 dielectrics. 8 Furthermore, N 2 O-plasma oxide has been reported to h...

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Section: Methodsmentioning

confidence: 99%

mentioning

confidence: 99%

Low-Temperature Poly-Si Thin-Film Transistor with a N[sub 2]O-Plasma ONO Multilayer Gate Dielectric

Chang

Yang

Hung

2004

Electrochem. Solid-State Lett.

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“…6,7 The main focus of that study has been on oxynitrides and oxide/nitride stacks, which show slightly higher dielectric constant, reduced leakage current, improved resistance to boron diffusion, and better reliability. 8 The oxynitrides ex-hibit superior properties as compared to conventional SiO 2 .…”

Section: Advances In High-k Dielectric Gate Materials For Future Ulsimentioning

confidence: 99%

“…The result also indicates better interface trap density and improved breakdown voltage. 6 Wu et al have reported electrical characteristics and reliability studies of ultra-thin La 2 O 3 gate dielectric. 8 Capacitance of 33 Å La 2 O 3 gate dielectric has been shown to be 7.2 mF/cm 2 , providing an effective k value of approximately 27 and an equivalent oxide thickness (EOT) of 4.8 Å. Low-leakage current density of 0.06 A/ cm 2 at 1V, high effective-breakdown field of 13.5 MV/cm and low interface-trap density of 3 ¥ 10 10 /cm 2 -eV has also been reported for La 2 O 3 .…”

Section: Electrical Characterizationmentioning

confidence: 99%

Advances in high-k dielectric gate materials for future ULSI devices

Sharma

Kumar

Anthony

2001

JOM

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Overview Microelectronic ProcessingThis article discusses recent developments in high dielectric constant gate insulator materials for future ultra-large-scale integration devices below 100 nm. Since conventional gate oxide poses problems as device features are scaled down, it becomes necessary to develop new gate dielectric materials with properties similar to SiO 2 and compatible with current complementary metal-oxide semiconductor technology. As the thickness of silicon dioxide approaches less than 1.5 nm, the leakage current becomes higher than 1 A/cm 2 and tunnel current increases significantly. Therefore, materials are needed to provide excellent electrical characteristics such as dielectric constant higher than 30, interface-state-density less than 1 ¥ 10 11 / cm 2 -eV, tunneling current less than 10 mA/ cm 2 , and negligible hysteresis. Many high dielectric constant materials have been reported that could potentially replace SiO 2 . These include SiO x N , and silicates of hafnium and zirconium. These materials exhibit the desired high dielectric constants for applications as gate dielectrics in sub-100 nm silicon technology. However, detailed studies need to be performed to evaluate the compatibility of these materials with the rest of the silicon integrated-circuit manufacturing processes.

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“…The incorporation of nitrogen can not only provide a physically thicker film with the same electrically equivalent oxide thickness (EOT) for reducing tunneling current but also effectively suppress the boron difision. In the past, a vanet+ of techniques, such as oxynitride stack [2], jet vapor deposition (JVD) nitride [3], remote plasma nitridation (RPN) . [4], decouple plasma nitridation (DPN) [SI, and stacked nitrideioxide (NiO) [6] have been studied extensively, and the benefit of alleviating the above-mentioned problems bas also been demonstrated.…”

Section: Introductionmentioning

confidence: 99%

Nitrogen-related enhanced reliability degradation in nMOSFETs with 1.6 nm gate dielectric

Chen

Chien²,

Ou³

et al. 2003

Extended Abstracts of International Workshop on Gate Insulator (IEEE Cat. No.03EX765)

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Gate quality ultrathin (2.5 nm) PECVD deposited oxynitride and nitrided oxide dielectrics

Cited by 17 publications

References 9 publications

Low-Temperature Poly-Si Thin-Film Transistor with a N[sub 2]O-Plasma ONO Multilayer Gate Dielectric

Low-Temperature Poly-Si Thin-Film Transistor with a N[sub 2]O-Plasma ONO Multilayer Gate Dielectric

Advances in high-k dielectric gate materials for future ULSI devices

Nitrogen-related enhanced reliability degradation in nMOSFETs with 1.6 nm gate dielectric

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