Hardware Design for an IEEE-488/1978 Interface Chip

Abstract

A random-logic integrated realization of the IEEE-488/l978 standard interface is discussed. Techniques are shown to optimize the logic design as well as the testability.Summary. In the IEEE-488/1978 standard interface system (1) communication is established by means of a 16-wide bus and a selection of 10 possible functions per device. These functions are defined by means of state-