Hardware Design for Cascade-Structure, Dual-Stage, Current-Limiting, Solid-State DC Circuit Breaker

Abstract

Solid-state DC circuit breakers provide crucial support for the safe and reliable operation of low-voltage DC distribution networks. A hardware topology based on a cascaded structure with dual-stage, current-limiting, small-capacity, solid-state DC circuit breakers has been proposed. The hardware topology uses a series–parallel configuration of cascaded SCR (thyristors) and MOSFETs (metal oxide semiconductor field-effect transistors) in the transfer branch, which enhances the breaking capacity of the transfer branch. Additionally, a secondary current-limiting circuit composed of an inductor and resistor in parallel is integrated at the front end of the transfer branch to effectively improve the current-limiting performance of the circuit breaker. Meanwhile, a dissipation branch is introduced on the fault side to reduce the energy consumption burden on surge arresters. For the power supply system of the hardware part, a capacitor-powered method is adopted for safety and efficiency, with a capacitor switch serially connected to the capacitor power supply for high-precision control of the power supply. Current detection branches are introduced into each branch to provide conditions for the on–off control of semiconductor switching devices and experimental data analysis. The high-frequency control of semiconductor devices is achieved using optocoupler signal isolation chips and high-speed drive chips through a microcontroller STM32. Simulation verification based on MATLAB/SIMULINK software and experimental prototype testing have been conducted, and the results show that the hardware topology is correct and effective.