High Efficiency Indium Phosphide Oscillators for Pulsed Applications

Abstract

High efficiency indium phosphide oscillators have been developed for pulsed applications in the 12 to 18 GHz frequency range. The development of low thermal resistance structures has enabled long pulse or high duty factor operation to be readily achieved. Individual devices have given peak powers of lOW at efficiencies of up to 17% and peak powers of 40W at efficiencies of greater than 10% have been obtained from multiple diode arrays. A cavity stabilised two diode array has given output powers of 1oW at 10% efficiency with less than 0.5 MHz chirp for irsec pulses. CW priming has been used to obtain minimal delay and jitter of the leading edge of the rf pulse and intraspectral line noise of -80 dbc/Hz. High efficiency indium phosphide transferred electron oscillators, which utilise the high dc to rf conversion efficiency properties of the current limiting two zone cathode E1], have been developed for use in the 12-18 GHz frequency range for pulsed applications. The current limiting cathode has the advantage that not only is the conversion efficiency increased but the rf impedance level is also raised so that large area devices can be readily matched into the circuit. To date peak powers of 20W have been obtained from single devices at efficiencies greater than 12% at a frequency of 15 GHz.For applications in which pulse lengths of less than lrsec and duty factors of less than 0.25% are employed the simple ?layer-upt device, in which the heat sinking is through the supporting InP substrate, is quite adequate provided the resulting frequency chirp (typically 50-100 MHz/rsec) can be tolerated. This chirp can be reduced by a factor of two or plating a lO m thick gold heat reservoir onto the cathode contact; power droop is also reduced by this technique. Thermal analysis of these two structures [2) shows that the observed transient temperature changes within the device can be described quite adequately by existing theories, in which the transient thermal impedance of the layer up device is typically .50C/W/ pAsec. A considerable improvement in the device thermal performance can be achieved if an integral heat sink (IHS) device is constructed L2,31 so that the heat generated within the active region is efficiently removed into the plated heat sink. In addition the rf performance is often improved due to the removal of the parasitic losses associated with the thick substrate of the layer up structure. An SEM photograph of a typical IHS device is shown in Fig8re 1. The transient thermal impedance for this structure is typically 0.3 C/W/pOsec giving chirp values of 10-20 MHz/Msec, with dc thermal impedances of better than 20°C/W allowing operation at both long pulse (up to 10r sec) and high duty factors (up to 5%) without performance degradation. The limiting feature in the long pulse or high Plessey Research (Caswell) Limited, Al-len Clark Research Centre, Caswell, Towcester, Northants. UK. 769 duty factor operation is thermal in that the increase in temperature associated with this mode of operation leads to increased d...