High-image-rejection wireless-receiver architecture with a 3-phase active RC complex filter

Ugajin, Mamoru; Kobayashi, Yuta; Tsukahara, Takehiko

doi:10.1587/elex.12.20150329

Cited by 6 publications

(4 citation statements)

References 15 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…One of essential circuit blocks in the high-frequency wireless systems is a voltage-controlled oscillator (VCO). Various VCOs are investigated [5][6][7][8][9] for quadrature signal processing [10][11][12][13][14][15][16][17] in the high-performance wireless systems, however, a highfrequency VCO usually needs an exceptionally fine CMOS technology and/or a special high-Q inductor process [18][19][20][21][22][23] for suppressing the phase noise. Thus, their process cost could be considerably high.…”

Section: Introductionmentioning

confidence: 99%

A Study of Phase-Adjusting Architectures for Low-Phase-Noise Quadrature Voltage-Controlled Oscillators

Ugajin

Kakei²

2023

IEICE Trans. Electron.

Self Cite

View full text Add to dashboard Cite

Quadrature voltage-controlled oscillators (VCOs) with current-weight-average and voltage-weight-average phase-adjusting architectures are studied. The phase adjusting equalizes the oscillation frequency to the LC-resonant frequency. The merits of the equalization are explained by using Leeson's phase noise equation and the impulse sensitivity function (ISF). Quadrature VCOs with the phase-adjusting architectures are fabricated using 180-nm TSMC CMOS and show low-phase-noise performances compared to a conventional differential VCO. The ISF analysis and small-signal analysis also show that the drawbacks of the current-weightaverage phase-adjusting and voltage-weight-average phase-adjusting architectures are current-source noise effect and large additional capacitance, respectively. A voltage-average-adjusting circuit with a source follower at its input alleviates the capacitance increase.

show abstract

Section: Introductionmentioning

confidence: 99%

A Study of Phase-Adjusting Architectures for Low-Phase-Noise Quadrature Voltage-Controlled Oscillators

Ugajin

Kakei²

2023

IEICE Trans. Electron.

Self Cite

View full text Add to dashboard Cite

show abstract

“…One of essential circuit blocks in the high-frequency wireless systems is a voltage-controlled oscillator (VCO). Various quadrature (4-phase) VCOs are investigated [5][6][7][8][9] for quadrature signal processing [10][11][12][13][14][15][16][17] in the high-performance wireless systems, however, a high-frequency VCO usually needs a very fine CMOS technology and/or a special high-Q inductor process [18][19][20][21][22][23] for suppressing the phase noise. Thus, their process cost could be considerably high.…”

Section: Introductionmentioning

confidence: 99%

A quadrature voltage-controlled oscillator using phase-adjusting architecture for suppressing phase noise

Ugajin

Kakei

2021

IEICE Electron. Express

Self Cite

View full text Add to dashboard Cite

A low-phase-noise 25-GHz quadrature voltage-controlled oscillator (VCO) using 180-nm TSMC CMOS is presented. To equalize the oscillation frequency to the LC-resonant frequency, a phase shifter at a transistor gate adjusts a phase delay due to an RC delay in a transistor. This phase-adjusting architecture extends operation bias range and suppresses phase noise by 6 to 9 dB compared with a conventional differential VCO.

show abstract

“…In contrast with passive polyphase filters, active polyphase filters have the general advantages of small chip area, high signal gain and easy tuning. Many active polyphase filters have also been discussed in some literature [19,20,21,22,23,24,25,26,27,28,29,30], but few of them achieve strong image rejection at high operating frequency and low-power dissipation.…”

Section: Introductionmentioning

confidence: 99%

The design of large image rejection and wideband CMOS active polyphase filter for BeiDou RF receiver

Yin

wang

et al. 2020

IEICE Electron. Express

View full text Add to dashboard Cite

In this letter, a new circuit structure for CMOS active polyphase filter is proposed and analyzed. In the proposed structure, the currents produced from two cascode stage with a capacitor and single cascode stage in a single-stage are used to realize high-pass and low-pass functions, respectively. Compared to other conventional active polyphase filters, the proposed polyphase filter uses a simpler structure to achieve strong image rejection at the higher frequency while obtaining lower power consumption and smaller chip area. In the 0.18-µm CMOS process, the proposed active polyphase filter occupies less than 0.36mm 2 of chip area. From the measurements, the four-stage active polyphase filter shows an image rejection ratio of more than 58.2dB at frequencies of 26MHz to 65MHz, a voltage gain of 5.8dB and an IIP3 of 1.5dBm at 45 MHz while consuming only 2.64mA from a 1.8-V supply.

show abstract

High-image-rejection wireless-receiver architecture with a 3-phase active RC complex filter

Cited by 6 publications

References 15 publications

A Study of Phase-Adjusting Architectures for Low-Phase-Noise Quadrature Voltage-Controlled Oscillators

A Study of Phase-Adjusting Architectures for Low-Phase-Noise Quadrature Voltage-Controlled Oscillators

A quadrature voltage-controlled oscillator using phase-adjusting architecture for suppressing phase noise

The design of large image rejection and wideband CMOS active polyphase filter for BeiDou RF receiver

Contact Info

Product

Resources

About