High slew rate micro-power CMOS OTA with class AB input stage

Ivanov, Mikhail; Ismail, Mohammed; Иванов, Владимир Николаевич

doi:10.1109/mwscas.1997.662294

Cited by 7 publications

(2 citation statements)

References 10 publications

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“…While several techniques for improving the linearity of MOS transconductors are available in the literature; see for example [1], our major concern here is the class-AB transconductors. This is attributed to the fact that class-AB operational transconductance amplifiers (OTAs) exhibit greatly enhanced slew rates compared to the classical class-A OTAs for comparable DC power consumption; see for example [2] and [3].…”

Section: Introductionmentioning

confidence: 99%

Large signal performance of class-AB transconductance stage

Abuelma’atti

Abuelmaatti

2010

2010 International Conference on Electronic Devices, Systems and Applications

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This paper presents a simple mathematical model for the differential output-current/ differential input-voltage characteristic of the class-AB CMOS transconductor. The model, basically a Fourier series, yields closed-form expressions for the amplitudes of the harmonic and intermodulation components of the differential outputcurrent resulting from a multisinusoidal differential inputvoltage. The special case of a two-tone equal-amplitude differential input-voltage is considered in detail. The results show that the harmonic and intermodulation performance of the class-AB CMOS transconductor is strongly dependent on the values of the bias current of the transconductor and the amplitudes of the input tones with the third-order intermodulation component dominating over a wide range of the input voltage amplitudes and bias currents.The results also show that while the third-order harmonic and intermodulation products are monotonically increasing with the increase in the differential input-voltage amplitude, the second-order components are exhibiting maxima.

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Section: Introductionmentioning

confidence: 99%

Large signal performance of class-AB transconductance stage

Abuelma’atti

Abuelmaatti

2010

2010 International Conference on Electronic Devices, Systems and Applications

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“…However, at low switching frequencies [1] SR becomes the dominant parameter which imposes a minimum bias current in class A amplifiers [2]. In the last years, class AB stages which do not suffer from SR limitation, have demonstrated an efficient performance in terms of power dissipation and speed [3], [4], [5], [6], [7]. This paper explores the possibility of reducing the power consumption on Σ∆ modulators under a low voltage environment.…”

Section: Introductionmentioning

confidence: 99%

A low-voltage low-power QFG-based Sigma-Delta modulator for electroencephalogram applications

López-Morillo

Carvajal

Galán

et al. 2006

2006 IEEE Biomedical Circuits and Systems Conference

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A Sigma-Delta (Σ∆) modulator with 10 bits of resolution and only 55 nW power consumption for electroencephalogram (EEG) applications is presented. The overall modulator operates from 1.2V using Quasi-FloatingGates (QFG) based circuits. The system has been implemented in a standard 0.5-µm CMOS process. Post-layout simulations have been performed showing 70 dB of SNR with an oversampling ratio of 64.

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