High-Temperature SiC CMOS Comparator and op-amp for Protection Circuits in Voltage Regulators and Switch-Mode Converters

Rahman, Ashfaqur; Roy, Sajib; Murphree, Robert; Kotecha, Ramchandra; Addington, Kyle; Abbasi, Affan; Mantooth, H. Alan; Francis, A. Matthew; Holmes, Jim; Di, Jia

doi:10.1109/jestpe.2016.2584599

Cited by 39 publications

(13 citation statements)

References 27 publications

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“…A decade ago, Raytheon Systems Limited developed a proprietary 1.2 μm SiC CMOS technology, called high temperature silicon carbide (HiTSiC), and demonstrated integrated circuits [14], [15]. The group of Mantooth at the University of Arkansas demonstrated a comparator [16], 8-bit digitalto-analog converter (DAC) [17], voltage and current references [18], gate driver [19], complex digital circuits [20], protection circuits in voltage regulators and switch-mode converters [21], digitally controlled pulsewidth modulation (PWM) generator [22], and data converters [23]. However, the HiTSiC technology was discontinued in 2018.…”

Section: Integrated Digital and Analog Circuit Blocks In Amentioning

confidence: 99%

Integrated Digital and Analog Circuit Blocks in a Scalable Silicon Carbide CMOS Technology

Romijn

Vollebregt

Middelburg

et al. 2022

IEEE Trans. Electron Devices

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The wide bandgap of silicon carbide (SiC) has attracted a large interest over the past years in many research fields, such as power electronics, high operation temperature circuits, harsh environmental sensing, and more. To facilitate research on complex integrated SiC circuits, ensure reproducibility, and cut down cost, the availability of a low-voltage SiC technology for integrated circuits is of paramount importance. Here, we report on a scalable and open state-of-the-art SiC CMOS technology that addresses this need. An overview of technology parameters, including MOSFET threshold voltage, subthreshold slope, slope factor, and process transconductance, is reported. Conventional integrated digital and analog circuits, ranging from inverters to a 2-bit analog-to-digital converter, are reported. First yield predictions for both analog and digital circuits show great potential for increasing the amount of integrated devices in future applications.

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Section: Integrated Digital and Analog Circuit Blocks In Amentioning

confidence: 99%

Integrated Digital and Analog Circuit Blocks in a Scalable Silicon Carbide CMOS Technology

Romijn

Vollebregt

Middelburg

et al. 2022

IEEE Trans. Electron Devices

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“…Moreover, 4H-SiC is a unique candidate for the development of an integrated circuit (IC) technology that is still in its infancy. 4H-SiC IC technology operating at very high temperatures >300 °C [ 5 , 6 ] is very attractive, as it enables operation in environments and ambientes that are not accessible to conventional silicon or silicon on insulator (SOI) platforms [ 7 , 8 ]. Lateral complementary metal–oxide–semiconductor (CMOS) IC technology in 4H-SiC is desirable for the fabrication of large-scale integration devices due to its high noise immunity and low static power consumption [ 9 ].…”

Section: Introductionmentioning

confidence: 99%

Study of Carrier Mobilities in 4H-SiC MOSFETS Using Hall Analysis

Das

Zheng²,

Ahyi³

et al. 2022

Materials

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The channel conduction in 4H-SiC metal–oxide–semiconductor field effect transistors (MOSFETs) are highly impacted by charge trapping and scattering at the interface. Even though nitridation reduces the interface trap density, scattering still plays a crucial role in increasing the channel resistance in these transistors. In this work, the dominant scattering mechanisms are distinguished for inversion layer electrons and holes using temperature and body-bias-dependent Hall measurements on nitrided lateral 4H-SiC MOSFETs. The effect of the transverse electric field (Eeff) on carrier mobility is analyzed under strong inversion condition where surface roughness scattering becomes prevalent. Power law dependencies of the electron and hole Hall mobility for surface roughness scattering are determined to be Eeff−1.8 and Eeff−2.4, respectively, analogous to those of silicon MOSFETs. Moreover, for n-channel MOSFETs, the effect of phonon scattering is observed at zero body bias, whereas in p-channel MOSFETs, it is observed only under negative body biases. Along with the identification of regimes governed by different scattering mechanisms, these results highlight the importance of the selection of substrate doping and of Eeff in controlling the value of channel mobility in 4H-SiC MOSFETs.

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“…Also, thanks to the development of SiC technology, the SiC complementary metal oxide semiconductor (CMOS) integrated Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. circuits have been implemented for high-temperature applications [7]- [9]. The development and maturity of the SiC power device and integrated circuit technology has paved the way for the emergence and development of SiC power integrated circuits (ICs), which will empower many applications, such as automotive, industrial, energy harvesting and power conditioning [10].…”

Section: ⅰ Introductionmentioning

confidence: 99%

A 1200-V-Class Ultra-Low Specific On-Resistance SiC Lateral MOSFET With Double Trench Gate and VLD Technique

Kong

Gao

et al. 2022

IEEE J. Electron Devices Soc.

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An ultra-low specific on-resistance 4H-SiC power laterally diffused metal oxide semiconductor (LDMOS) device is proposed for 1200V-class applications. In the proposed SiC LDMOS device, a double-trench gate is introduced to reduce the channel region resistance. And a p-type variation lateral doping (VLD) region is also employed in the drift region, which not only optimizes the surface electric field and improves the breakdown voltage, but also increases the doping concentration of the N-drift region, resulting in a low drift region resistance. So that, the proposed device achieves an ultra-low specific on-resistance (Ron,sp). Numerical Simulation results show that the Ron,sp of the proposed SiC LDMOS is 3.5 mΩcm 2 with a breakdown voltage of ～1460V, which is reduced by more than 46% compared with the conventional field-plate SiC LDMOS with a Ron,sp of 6.6 mΩcm 2 and a breakdown voltage of ～ 1210V. The transconductance of the proposed device is improved greatly. And the trade-off relationship between the Ron,sp and the breakdown voltage is also significantly improved compared with those of the conventional device and the previous literature.

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High-Temperature SiC CMOS Comparator and op-amp for Protection Circuits in Voltage Regulators and Switch-Mode Converters

Cited by 39 publications

References 27 publications

Integrated Digital and Analog Circuit Blocks in a Scalable Silicon Carbide CMOS Technology

Integrated Digital and Analog Circuit Blocks in a Scalable Silicon Carbide CMOS Technology

Study of Carrier Mobilities in 4H-SiC MOSFETS Using Hall Analysis

A 1200-V-Class Ultra-Low Specific On-Resistance SiC Lateral MOSFET With Double Trench Gate and VLD Technique

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