High Throughput Implementation of AES Algorithm Using Radiation Tolerant FPGA for Secure LST-SW Algorithm

Makhloufi, Assaad El; Adib, Samir El; Raissouni, Naoufal

doi:10.1109/commnet56067.2022.9993871

2022 5th International Conference on Advanced Communication Technologies and Networking (CommNet) 2022

DOI: 10.1109/commnet56067.2022.9993871

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High Throughput Implementation of AES Algorithm Using Radiation Tolerant FPGA for Secure LST-SW Algorithm

Assaad El Makhloufi

Samir El Adib

Naoufal Raissouni

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2024

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Hardware Area Efficient and Real-Time FPGA Implementation of PHMMRGB.

Şahin,

Narlı,

Türkoğlu

et al. 2024

ACM Trans. Embed. Comput. Syst.

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For encryption applications on embedded systems, operating in real-time while using minimal system resources is essential. It is expected that efficient and rapid encryption of high-resolution images is to be accomplished with limited hardware resources. Therefore, in order to ensure the desired efficiency of encryption of high-resolution images, the system must possess a digital architecture capable of achieving high speeds with minimal hardware resources. This study considered the limitations of a hardware architecture for an image encryption algorithm based on the Profile Hidden Markov Model called PHMMRGB. The proposed architecture is relatively simple in comparison to its alternatives. The hardware architecture, designed with the objective of using minimal resources, has been implemented on an FPGA. Based on the results of the proposed architecture, it is believed that the implementation of the specified method on an FPGA would yield high efficiency. Experiments conducted using large-sized satellite images confirmed this expectation.

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Hardware Area Efficient and Real-Time FPGA Implementation of PHMMRGB.

Şahin,

Narlı,

Türkoğlu

et al. 2024

ACM Trans. Embed. Comput. Syst.

View full text Add to dashboard Cite

show abstract

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High Throughput Implementation of AES Algorithm Using Radiation Tolerant FPGA for Secure LST-SW Algorithm

Cited by 1 publication

References 14 publications

Hardware Area Efficient and Real-Time FPGA Implementation of PHMMRGB.

Hardware Area Efficient and Real-Time FPGA Implementation of PHMMRGB.

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