Abstract:In 3D through-silicon-via (TS V) interposer package, there are large numbers of micro bumps and micro solder balls, the sizes of the entities in the package having a difference of 3 orders of magnitude. This multi -scale structure brings difficulties to establish the finite element model for analyzing the thermal fatigue life of board-level solder joint. Homogenization method is adopted to avoid these difficulties in this work. The micro bump/underfill layer between the chip and TS V interposer is replaced by … Show more
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