2013
DOI: 10.1109/mm.2013.9
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IBM zEC12: The Third-Generation High-Frequency Mainframe Microprocessor

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Cited by 22 publications
(10 citation statements)
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“…The introduction of the eDRAM in the cache introduces density, resulting in low leakage consumption. Shum et al [77] discuss an IBM zNext chip, which is a 3 rd Generation high frequency microprocessor chip. The chip has 6 cores instead of 4, dedicated-core core processors and a 48MB eDRAM on-chip shared L3.…”
Section: Energy Saving Chipsmentioning
confidence: 99%
“…The introduction of the eDRAM in the cache introduces density, resulting in low leakage consumption. Shum et al [77] discuss an IBM zNext chip, which is a 3 rd Generation high frequency microprocessor chip. The chip has 6 cores instead of 4, dedicated-core core processors and a 48MB eDRAM on-chip shared L3.…”
Section: Energy Saving Chipsmentioning
confidence: 99%
“…The main components of the branch prediction logic are similar to those in the zEC12 processor [4], but there have been changes in their sizes and configurations (see Table 2). The first-level Branch Target Buffer (BTB1) is indexed and tagged with the virtual instruction address, and each BTB1 entry provides branch target address predictions.…”
Section: Branch Prediction and Instruction Fetchingmentioning
confidence: 99%
“…Since re-indexing of the search process now only occurs after predicted-taken branches, the 64-entry fast index table (FIT) [4] has been replaced with a 1,024-entry BTB1 column predictor (CPRED) that enables a fastest prediction rate of one taken branch every two cycles, the same as that provided by the FIT on the prior machine. The CPRED works by predicting for each search whether there will be a taken prediction from the BTB1, and if so, from which column.…”
Section: Branch Prediction and Instruction Fetchingmentioning
confidence: 99%
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“…With the introduction of the z13 architecture, the emphasis is on increasing performance while increasing power-efficiency through new architectural facilities that exploit application parallelism. To improve power-efficiency, the z13 processor operates at a reduced, more power-efficient, operating frequency of 5 GHz (dropping the frequency by approximately 10% from the 5.5-GHz IBM Enterprise [zEC12] processor [11]). To offset the reduced frequency and deliver overall performance growth, performance gains are achieved instead by CPI reduction and parallelism.…”
Section: Figurementioning
confidence: 99%