Impact of Non-Conducting HCI Degradation on Small-Signal Parameters in RF SOI MOSFET

Chaparro-Ortiz, Dora A.; Otero-Carrascal, Alan Y.; Gutiérrez-D., Edmundo A.; Torres-Torres, Reydezel; Huerta-Gonzalez, Oscar; Srinivasan, P.; Guarín, Fernando

doi:10.1109/irps48203.2023.10117622

Cited by 1 publication

(2 citation statements)

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“…Notice that the extracted small-signal conductance is G 0 = 27.4×10 −6 Ω −1 , which corresponds to a magnitude of the equivalent resistance exhibited by the oxide path at low frequencies of about 36.5 kΩ. This value is within the order of that obtained for degraded multi-finger RF transistors from a DC I G versus V G curve [24]. Now, consider the experimental data for C in , calculated from Equation (7).…”

Section: Parameter Extraction Methodologymentioning

confidence: 66%

“…For this purpose, several authors have proposed using RF measurement techniques to analyze the degradation in the response of the devices when carrying out TDDB tests [19,20]. In this regard, some RF measurement-based studies have been dedicated to identifying the effect of electrical stress on gain and cutoff frequency [21], on mobility and extrinsic parasitics [22], and, up until recently, also on the device's input impedance [23,24]. In fact, since, under typical operation, the input impedance is that associated with the gate-to-ground path, interesting information about the change in the oxide characteristics can be acquired when analyzing this parameter [25].…”

Section: Introductionmentioning

confidence: 99%

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RC-Effects on the Oxide of SOI MOSFET under Off-State TDDB Degradation: RF Characterization and Modeling

Otero-Carrascal,

Chaparro-Ortiz,

Srinivasan

et al. 2024

Micromachines

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Based on S-parameter measurements, the effect of dynamic trapping and de-trapping of charge in the gate oxide, the increase of dielectric loss due to polarization, and the impact of leakage current on the small-signal input impedance at RF is analyzed and represented. This is achieved by systematically extracting the corresponding model parameters from single device measurements at different frequency ranges, and then the methodology is applied to analyze the evolution of these parameters when the device is submitted to non-conducting electrical stress. This approach not only allows to inspect the impact of effects not occurring under DC conditions, such as the current due to the time varying dielectric polarization, but also to clearly distinguish effects in accordance with the functional form of their contribution to the device’s impedance. In fact, it is shown that minor changes in the model of the gate capacitance by including additional resistive and capacitive components allows for an excellent model-experiment correlation up to 30 GHz. Moreover, the accuracy of the correlation is shown to be maintained when applying the proposal to the device under different gate-to-source bias conditions and at several stages during off-state degradation.

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Section: Parameter Extraction Methodologymentioning

confidence: 66%