2022 IEEE Green Energy and Smart System Systems (IGESSC) 2022
DOI: 10.1109/igessc55810.2022.9955334
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Implementation of Chaotic Encryption Architecture on FPGA for On-Chip Secure Communication

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“…When comparing these experimental plots with the simulation plot, it can be seen that the hardware experimental data matches the attractor shape for each equation and generates the chaos. The details of these hardware implementation is published in our recent work [27].…”
Section: Logic-locked Secure Transceiversmentioning
confidence: 99%
“…When comparing these experimental plots with the simulation plot, it can be seen that the hardware experimental data matches the attractor shape for each equation and generates the chaos. The details of these hardware implementation is published in our recent work [27].…”
Section: Logic-locked Secure Transceiversmentioning
confidence: 99%