Imprint lithography template fabrication for emerging market applications

Resnick, Douglas J.

doi:10.1117/2.1200709.0823

Cited by 2 publications

(1 citation statement)

References 3 publications

(3 reference statements)

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“…This is because the ultimate resolution of the patterns fabricated by NIL is primarily determined by the resolution of the features on the surface of the template. Therefore, the template fabrication is considered as the greatest challenge for NIL [3][4][5] .…”

Section: Introductionmentioning

confidence: 99%

Fabrication of the nanoimprint template with periodic structures

Liu¹,

Wu²,

Cheng³

2014

SPIE Proceedings

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The holographic lithography -ion beam etching is adopted to fabricate the nanoimprint template with periodic structures. The accurate control of the high aspect ratio of the profile is achieved by the optimization of the holographic lithography and the choice of the appropriate parameters of ion beam etching. There are two major challenging steps of this method: 1) the holographic exposure and development in the fabrication of the photoresist mask and 2) the ion beam etching to transfer the photoresist mask to the fused silica. The experiment indicates that titled rotation of the ion beam etching combined with reactive ion beam etching can achieve the accurate control of the high aspect ratio structure. Two types of nanoimprint template have been fabricated: the period of 250nm and the groove depth of 380nm; the period of 600nm and groove depth of 1400nm, respectively.

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Section: Introductionmentioning

confidence: 99%

Fabrication of the nanoimprint template with periodic structures

Liu¹,

Wu²,

Cheng³

2014

SPIE Proceedings

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Nanoimprint lithography steppers for volume fabrication of leading-edge semiconductor integrated circuits

2017

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This article discusses the transition of a form of nanoimprint lithography technology, known as Jet and Flash Imprint Lithography (J-FIL), from research to a commercial fabrication infrastructure for leading-edge semiconductor integrated circuits (ICs). Leading-edge semiconductor lithography has some of the most aggressive technology requirements, and has been a key driver in the 50-year history of semiconductor scaling. Introducing a new, disruptive capability into this arena is therefore a case study in a “high-risk-high-reward” opportunity. This article first discusses relevant literature in nanopatterning including advanced lithography options that have been explored by the IC fabrication industry, novel research ideas being explored, and literature in nanoimprint lithography. The article then focuses on the J-FIL process, and the interdisciplinary nature of risk, involving nanoscale precision systems, mechanics, materials, material delivery systems, contamination control, and process engineering. Next, the article discusses the strategic decisions that were made in the early phases of the project including: (i) choosing a step and repeat process approach; (ii) identifying the first target IC market for J-FIL; (iii) defining the product scope and the appropriate collaborations to share the risk-reward landscape; and (iv) properly leveraging existing infrastructure, including minimizing disruption to the widely accepted practices in photolithography. Finally, the paper discusses the commercial J-FIL stepper system and associated infrastructure, and the resulting advances in the key lithographic process metrics such as critical dimension control, overlay, throughput, process defects, and electrical yield over the past 5 years. This article concludes with the current state of the art in J-FIL technology for IC fabrication, including description of the high volume manufacturing stepper tools created for advanced memory manufacturing.

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Imprint lithography template fabrication for emerging market applications

Abstract: High-resolution thin templates can be used to imprint both photoniccrystal and patterned media devices on full wafers and disks.

Cited by 2 publications

References 3 publications

Fabrication of the nanoimprint template with periodic structures

Fabrication of the nanoimprint template with periodic structures

Nanoimprint lithography steppers for volume fabrication of leading-edge semiconductor integrated circuits

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